mirror of
https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
172 lines
4.5 KiB
C
172 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
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*/
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#include <common.h>
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#include <vbe.h>
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#include <asm/acpi_s3.h>
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#include <asm/coreboot_tables.h>
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#include <asm/e820.h>
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DECLARE_GLOBAL_DATA_PTR;
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int high_table_reserve(void)
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{
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/* adjust stack pointer to reserve space for configuration tables */
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gd->arch.high_table_limit = gd->start_addr_sp;
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gd->start_addr_sp -= CONFIG_HIGH_TABLE_SIZE;
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gd->arch.high_table_ptr = gd->start_addr_sp;
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/* clear the memory */
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#ifdef CONFIG_HAVE_ACPI_RESUME
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if (gd->arch.prev_sleep_state != ACPI_S3)
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#endif
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memset((void *)gd->arch.high_table_ptr, 0,
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CONFIG_HIGH_TABLE_SIZE);
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gd->start_addr_sp &= ~0xf;
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return 0;
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}
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void *high_table_malloc(size_t bytes)
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{
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u32 new_ptr;
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void *ptr;
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new_ptr = gd->arch.high_table_ptr + bytes;
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if (new_ptr >= gd->arch.high_table_limit)
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return NULL;
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ptr = (void *)gd->arch.high_table_ptr;
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gd->arch.high_table_ptr = new_ptr;
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return ptr;
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}
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/**
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* cb_table_init() - initialize a coreboot table header
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*
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* This fills in the coreboot table header signature and the header bytes.
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* Other fields are set to zero.
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*
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* @cbh: coreboot table header address
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*/
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static void cb_table_init(struct cb_header *cbh)
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{
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memset(cbh, 0, sizeof(struct cb_header));
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memcpy(cbh->signature, "LBIO", 4);
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cbh->header_bytes = sizeof(struct cb_header);
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}
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/**
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* cb_table_add_entry() - add a coreboot table entry
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*
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* This increases the coreboot table entry size with added table entry length
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* and increases entry count by 1.
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*
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* @cbh: coreboot table header address
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* @cbr: to be added table entry address
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* @return: pointer to next table entry address
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*/
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static u32 cb_table_add_entry(struct cb_header *cbh, struct cb_record *cbr)
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{
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cbh->table_bytes += cbr->size;
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cbh->table_entries++;
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return (u32)cbr + cbr->size;
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}
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/**
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* cb_table_finalize() - finalize the coreboot table
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*
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* This calculates the checksum for all coreboot table entries as well as
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* the checksum for the coreboot header itself.
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*
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* @cbh: coreboot table header address
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*/
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static void cb_table_finalize(struct cb_header *cbh)
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{
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struct cb_record *cbr = (struct cb_record *)(cbh + 1);
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cbh->table_checksum = compute_ip_checksum(cbr, cbh->table_bytes);
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cbh->header_checksum = compute_ip_checksum(cbh, cbh->header_bytes);
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}
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void write_coreboot_table(u32 addr, struct memory_area *cfg_tables)
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{
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struct cb_header *cbh = (struct cb_header *)addr;
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struct cb_record *cbr;
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struct cb_memory *mem;
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struct cb_memory_range *map;
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struct e820_entry e820[32];
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struct cb_framebuffer *fb;
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struct vesa_mode_info *vesa;
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int i, num;
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cb_table_init(cbh);
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cbr = (struct cb_record *)(cbh + 1);
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/*
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* Two type of coreboot table entries are generated by us.
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* They are 'struct cb_memory' and 'struct cb_framebuffer'.
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*/
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/* populate memory map table */
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mem = (struct cb_memory *)cbr;
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mem->tag = CB_TAG_MEMORY;
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map = mem->map;
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/* first install e820 defined memory maps */
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num = install_e820_map(ARRAY_SIZE(e820), e820);
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for (i = 0; i < num; i++) {
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map->start.lo = e820[i].addr & 0xffffffff;
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map->start.hi = e820[i].addr >> 32;
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map->size.lo = e820[i].size & 0xffffffff;
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map->size.hi = e820[i].size >> 32;
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map->type = e820[i].type;
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map++;
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}
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/* then install all configuration tables */
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while (cfg_tables->size) {
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map->start.lo = cfg_tables->start & 0xffffffff;
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map->start.hi = cfg_tables->start >> 32;
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map->size.lo = cfg_tables->size & 0xffffffff;
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map->size.hi = cfg_tables->size >> 32;
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map->type = CB_MEM_TABLE;
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map++;
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num++;
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cfg_tables++;
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}
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mem->size = num * sizeof(struct cb_memory_range) +
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sizeof(struct cb_record);
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cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
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/* populate framebuffer table if we have sane vesa info */
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vesa = &mode_info.vesa;
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if (vesa->x_resolution && vesa->y_resolution) {
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fb = (struct cb_framebuffer *)cbr;
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fb->tag = CB_TAG_FRAMEBUFFER;
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fb->size = sizeof(struct cb_framebuffer);
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fb->x_resolution = vesa->x_resolution;
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fb->y_resolution = vesa->y_resolution;
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fb->bits_per_pixel = vesa->bits_per_pixel;
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fb->bytes_per_line = vesa->bytes_per_scanline;
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fb->physical_address = vesa->phys_base_ptr;
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fb->red_mask_size = vesa->red_mask_size;
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fb->red_mask_pos = vesa->red_mask_pos;
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fb->green_mask_size = vesa->green_mask_size;
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fb->green_mask_pos = vesa->green_mask_pos;
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fb->blue_mask_size = vesa->blue_mask_size;
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fb->blue_mask_pos = vesa->blue_mask_pos;
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fb->reserved_mask_size = vesa->reserved_mask_size;
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fb->reserved_mask_pos = vesa->reserved_mask_pos;
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cbr = (struct cb_record *)cb_table_add_entry(cbh, cbr);
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}
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cb_table_finalize(cbh);
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}
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