mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
5ea01ab10d
Since exynos4 and exyno5 share many settings, we should move these into a common file to avoid duplication. In effect the changes are that all exynos boards now have EXT4 and FAT write support. This affects exynos5250 and exynos5420 which previously did not. This also disables the ext2 commands which are equivalent to ext4 anyway. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
239 lines
7.0 KiB
C
239 lines
7.0 KiB
C
/*
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* Copyright (C) 2013 Samsung Electronics
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* Sanghee Kim <sh0130.kim@samsung.com>
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* Piotr Wilczek <p.wilczek@samsung.com>
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*
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* Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_TRATS2_H
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#define __CONFIG_TRATS2_H
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#include <configs/exynos4-common.h>
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#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
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#define CONFIG_TIZEN /* TIZEN lib */
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#define CONFIG_SYS_L2CACHE_OFF
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x10502000
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#endif
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/* TRATS2 has 4 banks of DRAM */
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#define CONFIG_NR_DRAM_BANKS 4
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
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#define CONFIG_SYS_TEXT_BASE 0x43e00000
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/* select serial console configuration */
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#define CONFIG_SERIAL2
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#define CONFIG_BAUDRATE 115200
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/* Console configuration */
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_BOOTARGS "Please use defined boot"
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#define CONFIG_BOOTCOMMAND "run mmcboot"
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
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- GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
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#define CONFIG_ENV_SIZE 4096
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#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_VARS_UBOOT_CONFIG
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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/* Tizen - partitions definitions */
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#define PARTS_CSA "csa-mmc"
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#define PARTS_BOOT "boot"
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#define PARTS_QBOOT "qboot"
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#define PARTS_CSC "csc"
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#define PARTS_ROOT "platform"
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#define PARTS_DATA "data"
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#define PARTS_UMS "ums"
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
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"name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
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"name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
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"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
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"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
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"name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
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"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
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#define CONFIG_DFU_ALT \
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"u-boot raw 0x80 0x800;" \
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"/uImage ext4 0 2;" \
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"/modem.bin ext4 0 2;" \
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"/exynos4412-trats2.dtb ext4 0 2;" \
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""PARTS_CSA" part 0 1;" \
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""PARTS_BOOT" part 0 2;" \
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""PARTS_QBOOT" part 0 3;" \
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""PARTS_CSC" part 0 4;" \
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""PARTS_ROOT" part 0 5;" \
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""PARTS_DATA" part 0 6;" \
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""PARTS_UMS" part 0 7;" \
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"params.bin raw 0x38 0x8\0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootk=" \
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"run loaduimage;" \
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"if run loaddtb; then " \
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"bootm 0x40007FC0 - ${fdtaddr};" \
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"fi;" \
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"bootm 0x40007FC0;\0" \
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"updatebackup=" \
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"mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
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" mmc dev 0 0\0" \
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"updatebootb=" \
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"mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
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"mmcboot=" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
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"run bootk\0" \
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"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
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"boottrace=setenv opts initcall_debug; run bootcmd\0" \
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"verify=n\0" \
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"rootfstype=ext4\0" \
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"console=" CONFIG_DEFAULT_CONSOLE \
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"kernelname=uImage\0" \
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"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
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"${kernelname}\0" \
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"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
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"${fdtfile}\0" \
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"mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
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"mmcbootpart=2\0" \
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"mmcrootpart=5\0" \
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"opts=always_resume=1\0" \
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"partitions=" PARTS_DEFAULT \
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"dfu_alt_info=" CONFIG_DFU_ALT \
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"uartpath=ap\0" \
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"usbpath=ap\0" \
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"consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
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"consoleoff=set console console=ram; save; reset\0" \
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"spladdr=0x40000100\0" \
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"splsize=0x200\0" \
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"splfile=falcon.bin\0" \
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"spl_export=" \
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"setexpr spl_imgsize ${splsize} + 8 ;" \
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"setenv spl_imgsize 0x${spl_imgsize};" \
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"setexpr spl_imgaddr ${spladdr} - 8 ;" \
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"setexpr spl_addr_tmp ${spladdr} - 4 ;" \
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"mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
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"spl export atags 0x40007FC0;" \
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"crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
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"mw.l ${spl_addr_tmp} ${splsize};" \
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"ext4write mmc ${mmcdev}:${mmcbootpart}" \
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" /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
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"setenv spl_imgsize;" \
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"setenv spl_imgaddr;" \
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"setenv spl_addr_tmp;\0" \
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"fdtaddr=40800000\0" \
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/* GPT */
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#define CONFIG_RANDOM_UUID
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/* I2C */
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#include <asm/arch/gpio.h>
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_S3C24X0
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#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
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#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
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#define CONFIG_MAX_I2C_NUM 8
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#define CONFIG_SYS_I2C_SOFT
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#define CONFIG_SYS_I2C_SOFT_SPEED 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
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#define I2C_SOFT_DECLARATIONS2
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#define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
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#define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
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#define CONFIG_SOFT_I2C_READ_REPEATED_START
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#define CONFIG_SYS_I2C_INIT_BOARD
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#ifndef __ASSEMBLY__
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int get_soft_i2c_scl_pin(void);
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int get_soft_i2c_sda_pin(void);
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#endif
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#define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
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#define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
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/* POWER */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_MAX77686
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#define CONFIG_POWER_PMIC_MAX77693
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#define CONFIG_POWER_MUIC_MAX77693
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#define CONFIG_POWER_FG_MAX77693
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#define CONFIG_POWER_BATTERY_TRATS2
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/* Security subsystem - enable hw_rand() */
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#define CONFIG_EXYNOS_ACE_SHA
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#define CONFIG_LIB_HW_RAND
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/* Common misc for Samsung */
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#define CONFIG_MISC_COMMON
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#define CONFIG_MISC_INIT_R
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/* Download menu - Samsung common */
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#define CONFIG_LCD_MENU
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#define CONFIG_LCD_MENU_BOARD
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/* Download menu - definitions for check keys */
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#ifndef __ASSEMBLY__
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#include <power/max77686_pmic.h>
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#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
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#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
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#define KEY_PWR_STATUS_MASK (1 << 0)
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#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
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#define KEY_PWR_INTERRUPT_MASK (1 << 1)
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#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
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#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
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#endif /* __ASSEMBLY__ */
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/* LCD console */
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#define LCD_BPP LCD_COLOR16
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#define CONFIG_SYS_WHITE_ON_BLACK
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/* LCD */
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#define CONFIG_EXYNOS_FB
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#define CONFIG_LCD
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_FB_ADDR 0x52504000
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#define CONFIG_S6E8AX0
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#define CONFIG_EXYNOS_MIPI_DSIM
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#define CONFIG_VIDEO_BMP_GZIP
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
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#endif /* __CONFIG_H */
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