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https://github.com/brain-hackers/u-boot-brain
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![Andy Fleming](/assets/img/avatar_default.png)
From: Ed Swarthout <Ed.Swarthout@freescale.com> Support external interrupts from platform to eliminate system hangs. Define CONFIG_INTERRUPTS board configure option to enable. Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC. Remove extra cpu initialization redundant with hardware initialization. Whitespace cleanup. Define and use _START_OFFSET consistent with other processors using ppc_asm.tmpl Move additional code from .text to boot page to make room for exception vectors at start of image. Handle Machine Check, External and Critical exceptions. Fix e500 machine check error determination in traps.c TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
196 lines
4.5 KiB
C
196 lines
4.5 KiB
C
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2002 (440 port)
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* Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
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*
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* (C) Copyright 2003 Motorola Inc. (MPC85xx port)
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* Xianghua Xiao (X.Xiao@motorola.com)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <ppc_asm.tmpl>
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unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
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static __inline__ unsigned long get_msr(void)
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{
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unsigned long msr;
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asm volatile("mfmsr %0" : "=r" (msr) :);
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return msr;
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}
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static __inline__ void set_msr(unsigned long msr)
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{
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asm volatile("mtmsr %0" : : "r" (msr));
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asm volatile("isync");
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}
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static __inline__ unsigned long get_dec (void)
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{
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unsigned long val;
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asm volatile ("mfdec %0":"=r" (val):);
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return val;
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}
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static __inline__ void set_dec (unsigned long val)
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{
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if (val)
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asm volatile ("mtdec %0"::"r" (val));
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}
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void enable_interrupts (void)
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{
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set_msr (get_msr() | MSR_EE);
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}
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/* returns flag if MSR_EE was set before */
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int disable_interrupts (void)
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{
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ulong msr = get_msr();
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set_msr (msr & ~MSR_EE);
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return ((msr & MSR_EE) != 0);
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}
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int interrupt_init (void)
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{
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volatile immap_t *immr = (immap_t *)CFG_IMMR;
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immr->im_pic.gcr = MPC85xx_PICGCR_RST;
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while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
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immr->im_pic.gcr = MPC85xx_PICGCR_M;
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decrementer_count = get_tbclk() / CFG_HZ;
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mtspr(SPRN_TCR, TCR_PIE);
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set_dec (decrementer_count);
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set_msr (get_msr () | MSR_EE);
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#ifdef CONFIG_INTERRUPTS
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volatile ccsr_pic_t *pic = &immr->im_pic;
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pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
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debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
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pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
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debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
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pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
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debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
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#ifdef CONFIG_PCI1
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pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
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debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
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#endif
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#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
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pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
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debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
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#endif
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#ifdef CONFIG_PCIE1
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pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
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debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
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#endif
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#ifdef CONFIG_PCIE3
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pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
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debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
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#endif
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pic->ctpr=0; /* 40080 clear current task priority register */
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#endif
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return (0);
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}
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/*
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* Install and free a interrupt handler. Not implemented yet.
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*/
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void
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irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
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{
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return;
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}
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void
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irq_free_handler(int vec)
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{
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return;
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}
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/****************************************************************************/
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volatile ulong timestamp = 0;
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/*
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* timer_interrupt - gets called when the decrementer overflows,
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* with interrupts disabled.
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* Trivial implementation - no need to be really accurate.
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*/
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void timer_interrupt(struct pt_regs *regs)
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{
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timestamp++;
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set_dec (decrementer_count);
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mtspr(SPRN_TSR, TSR_PIS);
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#if defined(CONFIG_WATCHDOG)
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if ((timestamp % 1000) == 0)
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reset_85xx_watchdog();
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#endif /* CONFIG_WATCHDOG */
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}
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void reset_timer (void)
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{
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timestamp = 0;
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}
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ulong get_timer (ulong base)
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{
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return (timestamp - base);
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}
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void set_timer (ulong t)
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{
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timestamp = t;
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}
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#if defined(CONFIG_CMD_IRQ)
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/*******************************************************************************
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*
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* irqinfo - print information about PCI devices,not implemented.
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*
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*/
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int
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do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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printf ("\nInterrupt-unsupported:\n");
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return 0;
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}
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#endif
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