mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
116 lines
2.8 KiB
C
116 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/**
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* Copyright 2014 Freescale Semiconductor
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*
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* This file provides support for the board-specific CPLD used on some Freescale
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* reference boards.
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*
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* The following macros need to be defined:
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*
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* CONFIG_SYS_CPLD_BASE-The virtual address of the base of the CPLD register map
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/io.h>
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#include "cpld.h"
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u8 cpld_read(unsigned int reg)
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{
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void *p = (void *)CONFIG_SYS_CPLD_BASE;
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return in_8(p + reg);
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}
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void cpld_write(unsigned int reg, u8 value)
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{
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void *p = (void *)CONFIG_SYS_CPLD_BASE;
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out_8(p + reg, value);
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}
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/**
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* Set the boot bank to the alternate bank
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*/
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void cpld_set_altbank(void)
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{
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u8 reg = CPLD_READ(flash_ctl_status);
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reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_ALTBANK;
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CPLD_WRITE(flash_ctl_status, reg);
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CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
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}
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/**
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* Set the boot bank to the default bank
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*/
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void cpld_set_defbank(void)
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{
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u8 reg = CPLD_READ(flash_ctl_status);
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reg = (reg & ~CPLD_BANK_SEL_MASK) | CPLD_LBMAP_DFLTBANK;
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CPLD_WRITE(flash_ctl_status, reg);
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CPLD_WRITE(reset_ctl1, CPLD_LBMAP_RESET);
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}
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#ifdef DEBUG
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static void cpld_dump_regs(void)
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{
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printf("cpld_ver = 0x%02x\n", CPLD_READ(cpld_ver));
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printf("cpld_ver_sub = 0x%02x\n", CPLD_READ(cpld_ver_sub));
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printf("hw_ver = 0x%02x\n", CPLD_READ(hw_ver));
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printf("sw_ver = 0x%02x\n", CPLD_READ(sw_ver));
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printf("reset_ctl1 = 0x%02x\n", CPLD_READ(reset_ctl1));
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printf("reset_ctl2 = 0x%02x\n", CPLD_READ(reset_ctl2));
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printf("int_status = 0x%02x\n", CPLD_READ(int_status));
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printf("flash_ctl_status = 0x%02x\n", CPLD_READ(flash_ctl_status));
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printf("fan_ctl_status = 0x%02x\n", CPLD_READ(fan_ctl_status));
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#if defined(CONFIG_TARGET_T1040D4D4RDB) || defined(CONFIG_TARGET_T1042D4RDB)
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printf("int_mask = 0x%02x\n", CPLD_READ(int_mask));
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#else
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printf("led_ctl_status = 0x%02x\n", CPLD_READ(led_ctl_status));
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#endif
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printf("sfp_ctl_status = 0x%02x\n", CPLD_READ(sfp_ctl_status));
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printf("misc_ctl_status = 0x%02x\n", CPLD_READ(misc_ctl_status));
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printf("boot_override = 0x%02x\n", CPLD_READ(boot_override));
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printf("boot_config1 = 0x%02x\n", CPLD_READ(boot_config1));
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printf("boot_config2 = 0x%02x\n", CPLD_READ(boot_config2));
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putc('\n');
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}
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#endif
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int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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int rc = 0;
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if (argc <= 1)
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return cmd_usage(cmdtp);
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if (strcmp(argv[1], "reset") == 0) {
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if (strcmp(argv[2], "altbank") == 0)
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cpld_set_altbank();
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else
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cpld_set_defbank();
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#ifdef DEBUG
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} else if (strcmp(argv[1], "dump") == 0) {
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cpld_dump_regs();
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#endif
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} else
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rc = cmd_usage(cmdtp);
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return rc;
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}
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U_BOOT_CMD(
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cpld, CONFIG_SYS_MAXARGS, 1, do_cpld,
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"Reset the board or alternate bank",
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"reset - hard reset to default bank\n"
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"cpld reset altbank - reset to alternate bank\n"
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#ifdef DEBUG
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"cpld dump - display the CPLD registers\n"
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#endif
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);
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