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https://github.com/brain-hackers/u-boot-brain
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4c158b9a7d
On DRA7xx platform, CPU Core 1 is not used in u-boot. However, in some cases it is need to make secure API calls from Core 1. This patch adds an assembly function to make a secure (SMC) call from CPU Core #1. Signed-off-by: Harinarayan Bhatta <harinarayan@ti.com> Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
19 lines
404 B
Makefile
19 lines
404 B
Makefile
#
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# (C) Copyright 2000-2010
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += boot.o
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obj-y += hwinit.o
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obj-y += emif.o
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obj-y += sdram.o
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obj-y += prcm-regs.o
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obj-y += hw_data.o
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obj-y += abb.o
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obj-y += fdt.o
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obj-$(CONFIG_IODELAY_RECALIBRATION) += dra7xx_iodelay.o
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obj-$(CONFIG_TI_SECURE_DEVICE) += sec-fxns.o
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obj-$(CONFIG_DRA7XX) += sec_entry_cpu1.o
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