mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 09:58:52 +09:00
![Haavard Skinnemoen](/assets/img/avatar_default.png)
- Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
65 lines
1.9 KiB
C
65 lines
1.9 KiB
C
/*
|
|
* Copyright (C) 2006, 2008 Atmel Corporation
|
|
*
|
|
* See file CREDITS for list of people who contributed to this
|
|
* project.
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
* MA 02111-1307 USA
|
|
*/
|
|
#ifndef __ASM_AVR32_ARCH_GPIO_H__
|
|
#define __ASM_AVR32_ARCH_GPIO_H__
|
|
|
|
#include <asm/arch/chip-features.h>
|
|
#include <asm/arch/memory-map.h>
|
|
|
|
#define NR_GPIO_CONTROLLERS 5
|
|
|
|
/*
|
|
* Pin numbers identifying specific GPIO pins on the chip.
|
|
*/
|
|
#define GPIO_PIOA_BASE (0)
|
|
#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
|
|
#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
|
|
#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
|
|
#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
|
|
#define GPIO_PIN_PA(x) (GPIO_PIOA_BASE + (x))
|
|
#define GPIO_PIN_PB(x) (GPIO_PIOB_BASE + (x))
|
|
#define GPIO_PIN_PC(x) (GPIO_PIOC_BASE + (x))
|
|
#define GPIO_PIN_PD(x) (GPIO_PIOD_BASE + (x))
|
|
#define GPIO_PIN_PE(x) (GPIO_PIOE_BASE + (x))
|
|
|
|
static inline void *pio_pin_to_port(unsigned int pin)
|
|
{
|
|
switch (pin >> 5) {
|
|
case 0:
|
|
return (void *)PIOA_BASE;
|
|
case 1:
|
|
return (void *)PIOB_BASE;
|
|
case 2:
|
|
return (void *)PIOC_BASE;
|
|
case 3:
|
|
return (void *)PIOD_BASE;
|
|
case 4:
|
|
return (void *)PIOE_BASE;
|
|
default:
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
#include <asm/arch-common/portmux-pio.h>
|
|
|
|
#endif /* __ASM_AVR32_ARCH_GPIO_H__ */
|