mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 22:26:16 +09:00
699c40e878
The ULPI port is routed onto pins on the mini PCI Express connector. A standard breakout board may be used to access the port. * Add required DT entries to configure the ULPI port. * Setup up the ULPI pinmux in the board code. * Enable multiple USB controller and ULPI support in the board config. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
69 lines
1013 B
Plaintext
69 lines
1013 B
Plaintext
/dts-v1/;
|
|
|
|
/include/ ARCH_CPU_DTS
|
|
|
|
/ {
|
|
model = "NVIDIA Tegra20 Harmony evaluation board";
|
|
compatible = "nvidia,harmony", "nvidia,tegra20";
|
|
|
|
aliases {
|
|
usb0 = "/usb@c5008000";
|
|
usb1 = "/usb@c5004000";
|
|
};
|
|
|
|
memory {
|
|
reg = <0x00000000 0x40000000>;
|
|
};
|
|
|
|
clocks {
|
|
clk_32k: clk_32k {
|
|
clock-frequency = <32000>;
|
|
};
|
|
osc {
|
|
clock-frequency = <12000000>;
|
|
};
|
|
};
|
|
|
|
clock@60006000 {
|
|
clocks = <&clk_32k &osc>;
|
|
};
|
|
|
|
serial@70006300 {
|
|
clock-frequency = < 216000000 >;
|
|
};
|
|
|
|
i2c@7000c000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@7000c400 {
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@7000c500 {
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@7000d000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
usb@c5000000 {
|
|
status = "disabled";
|
|
};
|
|
|
|
usb@c5004000 {
|
|
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
|
|
};
|
|
|
|
nand-controller@70008000 {
|
|
nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
|
|
nvidia,width = <8>;
|
|
nvidia,timing = <26 100 20 80 20 10 12 10 70>;
|
|
nand@0 {
|
|
reg = <0>;
|
|
compatible = "hynix,hy27uf4g2b", "nand-flash";
|
|
};
|
|
};
|
|
};
|