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https://github.com/brain-hackers/u-boot-brain
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c0a2b086b2
This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
24 lines
777 B
C
24 lines
777 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2017
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
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*/
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#ifndef _GDSYS_SOC_H_
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#define _GDSYS_SOC_H_
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/**
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* gdsys_soc_get_fpga() - Retrieve pointer to parent bus' FPGA device
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* @child: The child device on the FPGA bus needing access to the FPGA.
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* @fpga: Pointer to the retrieved FPGA device.
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*
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* To access their register maps, devices on gdsys soc buses usually have
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* facilitate the accessor function of the IHS FPGA their parent bus is
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* attached to. To access the FPGA device from within the bus' children, this
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* function returns a pointer to it.
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*
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* Return: 0 on success, -ve on failure
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*/
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int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga);
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#endif /* _GDSYS_SOC_H_ */
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