mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 04:36:16 +09:00
71556fbcbf
Move to using device tree control in SPL so that we can use the same driver code in both SPL and U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
71 lines
1.3 KiB
Plaintext
71 lines
1.3 KiB
Plaintext
/*
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* Copyright (c) 2014 Xilinx, Inc. Michal Simek
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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MEMORY { .sram : ORIGIN = CONFIG_SPL_TEXT_BASE,\
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LENGTH = CONFIG_SPL_MAX_SIZE }
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MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
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LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = ALIGN(4);
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.text :
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{
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__image_copy_start = .;
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*(.vectors)
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CPUDIR/start.o (.text*)
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*(.text*)
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} > .sram
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. = ALIGN(4);
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.rodata : {
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
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} > .sram
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. = ALIGN(4);
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.data : {
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*(.data*)
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} > .sram
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. = ALIGN(4);
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#ifdef CONFIG_SPL_DM
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.u_boot_list : {
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KEEP(*(SORT(.u_boot_list_*_driver_*)));
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KEEP(*(SORT(.u_boot_list_*_uclass_*)));
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} > .sram
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. = ALIGN(4);
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#endif
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. = .;
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_image_binary_end = .;
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_end = .;
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/* Move BSS section to RAM because of FAT */
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.bss (NOLOAD) : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end = .;
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} > .sdram
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/DISCARD/ : { *(.dynsym) }
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/DISCARD/ : { *(.dynstr*) }
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/DISCARD/ : { *(.dynamic*) }
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/DISCARD/ : { *(.plt*) }
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/DISCARD/ : { *(.interp*) }
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/DISCARD/ : { *(.gnu*) }
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}
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