Xu Ziyuan 2179a07c0c rockchip: rk3288: sdram: fix DDR address range ... The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. Actually, some IP controller can't address to, so let's limit the available range. This patch fixes a bug which found in miniarm-rk3288-4GB board. The U-Boot was relocated to 0xfef72000, and .bss variants was also relocated, such as do_fat_read_at_block. Once eMMC controller transfer data to do_fat_read_at_block via DMA, DMAC can't access more than 0xfe000000. So that DMAC didn't work sane. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>		2016-10-01 18:35:01 -06:00
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clk_rk3288.c	rockchip: Add a way to obtain the main clock device	2016-07-25 20:46:45 -06:00
Kconfig	Convert CONFIG_SPL_SERIAL_SUPPORT to Kconfig	2016-09-16 17:27:19 -04:00
Makefile	rk3288: add arch_cpu_init for rk3288	2016-09-22 07:32:22 -06:00
rk3288.c	rk3288: add arch_cpu_init for rk3288	2016-09-22 07:32:22 -06:00
sdram_rk3288.c	rockchip: rk3288: sdram: fix DDR address range	2016-10-01 18:35:01 -06:00
syscon_rk3288.c	rockchip: syscon: Update to work with of-platdata	2016-07-14 20:40:24 -06:00