u-boot-brain/board/freescale/corenet_ds
York Sun 712cf7ab0b powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR
speed tables. Merge them for smaller tables. Also restructure the tables
for smaller size. Cleanup some typedefs.

Enforce strict checking for speed table. If DIMM is running at higher than
known speed, try to use the highest speed setting. If rank is unknown, it
has to panic.

Removed ODT overriding for P2020DS as it is not necessary.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-09 17:57:53 -05:00
..
corenet_ds.c powerpc/85xx: Cleanup extern in corenet_ds board code 2011-09-29 19:01:05 -05:00
corenet_ds.h powerpc/85xx: Cleanup extern in corenet_ds board code 2011-09-29 19:01:05 -05:00
ddr.c powerpc/mpc8xxx: Merge entries in DDR speed table 2011-10-09 17:57:53 -05:00
eth_hydra.c powerpc/hydra: Add ethernet support on P5020/P3041 DS boards 2011-09-29 19:01:05 -05:00
eth_p4080.c powerpc/85xx: Add FMan ethernet support to P4080DS 2011-09-29 19:01:05 -05:00
Makefile powerpc/85xx: refactor common P-Series CoreNet files for FSL boards 2011-09-29 19:01:06 -05:00
p3041ds_ddr.c powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code) 2011-04-27 22:29:04 -05:00
p4080ds_ddr.c powerpc/85xx: Update fixed DDR3 timing table for P4080DS 2011-04-04 09:24:41 -05:00
p5020ds_ddr.c powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code) 2011-04-27 22:29:04 -05:00