mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-25 20:39:43 +09:00
f1df936445
This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the Armada A38x boot image. Not linked with the main U-Boot. With this code addition and the serdes/PHY setup code, the Armada A38x support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Note: This code has undergone many hours (days!) of coding-style cleanup and refactoring. It still is not checkpatch clean though, I'm afraid. As the factoring of the code has so many levels of indentation that many lines are longer than 80 chars. Signed-off-by: Stefan Roese <sr@denx.de>
23 lines
504 B
C
23 lines
504 B
C
/*
|
|
* Copyright (C) Marvell International Ltd. and its affiliates
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0
|
|
*/
|
|
|
|
#ifndef _DDR3_A38X_TOPOLOGY_H
|
|
#define _DDR3_A38X_TOPOLOGY_H
|
|
|
|
#include "ddr_topology_def.h"
|
|
|
|
/* Bus mask variants */
|
|
#define BUS_MASK_32BIT 0xf
|
|
#define BUS_MASK_32BIT_ECC 0x1f
|
|
#define BUS_MASK_16BIT 0x3
|
|
#define BUS_MASK_16BIT_ECC 0x13
|
|
#define BUS_MASK_16BIT_ECC_PUP3 0xb
|
|
|
|
#define DYNAMIC_CS_SIZE_CONFIG
|
|
#define DISABLE_L2_FILTERING_DURING_DDR_TRAINING
|
|
|
|
#endif /* _DDR3_A38X_TOPOLOGY_H */
|