mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-09 06:13:21 +09:00
d1cd045982
On x86 it is common to use 'post codes' which are 8-bit hex values emitted from the code and visible to the user. Traditionally two 7-segment displays were made available on the motherboard to show the last post code that was emitted. This allows diagnosis of a boot problem since it is possible to see where the code got to before it died. On modern hardware these codes are not normally visible. On Chromebooks they are displayed by the Embedded Controller (EC), so it is useful to emit them. We must enable this feature for the EC to see the codes, so add an option for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
222 lines
5.0 KiB
ArmAsm
222 lines
5.0 KiB
ArmAsm
/*
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* U-boot - x86 Startup Code
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*
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* (C) Copyright 2008-2011
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* Graeme Russ, <graeme.russ@gmail.com>
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*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/global_data.h>
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#include <asm/post.h>
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#include <asm/processor.h>
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#include <asm/processor-flags.h>
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#include <generated/generic-asm-offsets.h>
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.section .text
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.code32
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.globl _start
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.type _start, @function
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.globl _x86boot_start
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_x86boot_start:
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/*
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* This is the fail safe 32-bit bootstrap entry point. The
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* following code is not executed from a cold-reset (actually, a
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* lot of it is, but from real-mode after cold reset. It is
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* repeated here to put the board into a state as close to cold
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* reset as necessary)
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*/
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cli
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cld
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/* Turn off cache (this might require a 486-class CPU) */
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movl %cr0, %eax
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orl $(X86_CR0_NW | X86_CR0_CD), %eax
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movl %eax, %cr0
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wbinvd
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/* Tell 32-bit code it is being entered from an in-RAM copy */
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movw $GD_FLG_WARM_BOOT, %bx
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jmp 1f
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_start:
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/*
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* This is the 32-bit cold-reset entry point. Initialize %bx to 0
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* in case we're preceeded by some sort of boot stub.
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*/
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movw $GD_FLG_COLD_BOOT, %bx
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1:
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/* Save BIST */
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movl %eax, %ebp
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/* Load the segement registes to match the gdt loaded in start16.S */
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movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
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movw %ax, %fs
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movw %ax, %ds
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movw %ax, %gs
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movw %ax, %es
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movw %ax, %ss
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/* Clear the interrupt vectors */
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lidt blank_idt_ptr
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/* Early platform init (setup gpio, etc ) */
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jmp early_board_init
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.globl early_board_init_ret
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early_board_init_ret:
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post_code(POST_START)
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/* Initialise Cache-As-RAM */
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jmp car_init
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.globl car_init_ret
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car_init_ret:
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/*
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* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
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* or fully initialised SDRAM - we really don't care which)
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* starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
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* and early malloc area.
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*
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* Stack grows down from top of CAR. We have:
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*
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* top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
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* global_data
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* x86 global descriptor table
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* early malloc area
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* stack
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* bottom-> CONFIG_SYS_CAR_ADDR
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*/
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/* Stack grows down from top of CAR */
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movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE), %esp
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/* Reserve space on stack for global data */
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subl $GENERATED_GBL_DATA_SIZE, %esp
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/* Align global data to 16-byte boundary */
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andl $0xfffffff0, %esp
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post_code(POST_START_STACK)
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/* Zero the global data since it won't happen later */
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xorl %eax, %eax
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movl $GENERATED_GBL_DATA_SIZE, %ecx
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movl %esp, %edi
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rep stosb
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/* Setup first parameter to setup_gdt, pointer to global_data */
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movl %esp, %eax
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/* Reserve space for global descriptor table */
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subl $X86_GDT_SIZE, %esp
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/* Align temporary global descriptor table to 16-byte boundary */
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andl $0xfffffff0, %esp
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movl %esp, %ecx
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#if defined(CONFIG_SYS_MALLOC_F_LEN)
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subl $CONFIG_SYS_MALLOC_F_LEN, %esp
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movl %eax, %edx
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addl $GD_MALLOC_BASE, %edx
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movl %esp, (%edx)
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#endif
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/* Store BIST */
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movl %eax, %edx
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addl $GD_BIST, %edx
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movl %ebp, (%edx)
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/* Set second parameter to setup_gdt */
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movl %ecx, %edx
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/* Setup global descriptor table so gd->xyz works */
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call setup_gdt
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/* Set parameter to board_init_f() to boot flags */
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post_code(POST_START_DONE)
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xorl %eax, %eax
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/* Enter, U-boot! */
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call board_init_f
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/* indicate (lack of) progress */
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movw $0x85, %ax
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jmp die
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* SDRAM has been initialised, U-Boot code has been copied into
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* RAM, BSS has been cleared and relocation adjustments have been
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* made. It is now time to jump into the in-RAM copy of U-Boot
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* Reserve space on stack for global data */
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subl $GENERATED_GBL_DATA_SIZE, %esp
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/* Align global data to 16-byte boundary */
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andl $0xfffffff0, %esp
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/* Setup first parameter to memcpy (and setup_gdt) */
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movl %esp, %eax
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/* Setup second parameter to memcpy */
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fs movl 0, %edx
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/* Set third parameter to memcpy */
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movl $GENERATED_GBL_DATA_SIZE, %ecx
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/* Copy global data from CAR to SDRAM stack */
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call memcpy
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/* Reserve space for global descriptor table */
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subl $X86_GDT_SIZE, %esp
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/* Align global descriptor table to 16-byte boundary */
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andl $0xfffffff0, %esp
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/* Set second parameter to setup_gdt */
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movl %esp, %edx
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/* Setup global descriptor table so gd->xyz works */
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call setup_gdt
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/* Re-enter U-Boot by calling board_init_f_r */
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call board_init_f_r
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die:
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hlt
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jmp die
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hlt
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blank_idt_ptr:
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.word 0 /* limit */
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.long 0 /* base */
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.p2align 2 /* force 4-byte alignment */
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multiboot_header:
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/* magic */
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.long 0x1BADB002
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/* flags */
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.long (1 << 16)
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/* checksum */
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.long -0x1BADB002 - (1 << 16)
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/* header addr */
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.long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
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/* load addr */
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.long CONFIG_SYS_TEXT_BASE
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/* load end addr */
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.long 0
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/* bss end addr */
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.long 0
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/* entry addr */
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.long CONFIG_SYS_TEXT_BASE
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