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https://github.com/brain-hackers/u-boot-brain
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37fa41256b
The config block support currently uses the ft_board_setup function to patch the device tree with config block information. However, this does not allow to patch the device tree with board specific information. Rename the common setup function to ft_common_board_setup and use the call it from the board files directly. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
138 lines
2.7 KiB
C
138 lines
2.7 KiB
C
/*
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* Toradex Colibri PXA270 Support
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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* Copyright (C) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pxa.h>
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#include <asm/arch/regs-mmc.h>
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#include <asm/arch/regs-uart.h>
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#include <asm/io.h>
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#include <dm/platdata.h>
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#include <dm/platform_data/serial_pxa.h>
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#include <netdev.h>
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#include <serial.h>
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#include <usb.h>
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#include "../common/tdx-common.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* We have RAM, disable cache */
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dcache_disable();
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icache_disable();
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/* arch number of Toradex Colibri PXA270 */
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gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0xa0000100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Model: Toradex Colibri PXA270\n");
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return 0;
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}
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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int ft_board_setup(void *blob, bd_t *bd)
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{
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return ft_common_board_setup(blob, bd);
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}
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#endif
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int dram_init(void)
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{
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pxa2xx_dram_init();
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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#ifdef CONFIG_CMD_USB
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int board_usb_init(int index, enum usb_init_type init)
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{
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writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
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~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
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UHCHR);
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writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
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while (UHCHR & UHCHR_FSBIR)
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;
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writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
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writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
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/* Clear any OTG Pin Hold */
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if (readl(PSSR) & PSSR_OTGPH)
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writel(readl(PSSR) | PSSR_OTGPH, PSSR);
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writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
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writel(readl(UHCRHDA) | 0x100, UHCRHDA);
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/* Set port power control mask bits, only 3 ports. */
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writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
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/* enable port 2 */
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writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
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UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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void usb_board_stop(void)
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{
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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udelay(11);
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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writel(readl(UHCCOMS) | 1, UHCCOMS);
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udelay(10);
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writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
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return;
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}
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#endif
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#ifdef CONFIG_DRIVER_DM9000
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int board_eth_init(bd_t *bis)
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{
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return dm9000_initialize(bis);
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}
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#endif
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#ifdef CONFIG_CMD_MMC
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int board_mmc_init(bd_t *bis)
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{
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pxa_mmc_register(0);
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return 0;
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}
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#endif
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static const struct pxa_serial_platdata serial_platdata = {
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.base = (struct pxa_uart_regs *)FFUART_BASE,
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.port = FFUART_INDEX,
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.baudrate = CONFIG_BAUDRATE,
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};
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U_BOOT_DEVICE(pxa_serials) = {
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.name = "serial_pxa",
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.platdata = &serial_platdata,
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};
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