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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
200 lines
4.6 KiB
C
200 lines
4.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (c) 2015 Paul Thacker <paul.thacker@microchip.com>
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*
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <serial.h>
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#include <wait_bit.h>
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#include <mach/pic32.h>
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#include <dt-bindings/clock/microchip,clock.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* UART Control Registers */
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#define U_MOD 0x00
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#define U_MODCLR (U_MOD + _CLR_OFFSET)
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#define U_MODSET (U_MOD + _SET_OFFSET)
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#define U_STA 0x10
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#define U_STACLR (U_STA + _CLR_OFFSET)
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#define U_STASET (U_STA + _SET_OFFSET)
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#define U_TXR 0x20
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#define U_RXR 0x30
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#define U_BRG 0x40
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/* U_MOD bits */
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#define UART_ENABLE BIT(15)
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/* U_STA bits */
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#define UART_RX_ENABLE BIT(12)
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#define UART_TX_BRK BIT(11)
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#define UART_TX_ENABLE BIT(10)
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#define UART_TX_FULL BIT(9)
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#define UART_TX_EMPTY BIT(8)
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#define UART_RX_OVER BIT(1)
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#define UART_RX_DATA_AVAIL BIT(0)
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struct pic32_uart_priv {
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void __iomem *base;
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ulong uartclk;
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};
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/*
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* Initialize the serial port with the given baudrate.
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* The settings are always 8 data bits, no parity, 1 stop bit, no start bits.
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*/
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static int pic32_serial_init(void __iomem *base, ulong clk, u32 baudrate)
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{
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u32 div = DIV_ROUND_CLOSEST(clk, baudrate * 16);
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/* wait for TX FIFO to empty */
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wait_for_bit_le32(base + U_STA, UART_TX_EMPTY,
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true, CONFIG_SYS_HZ, false);
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/* send break */
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writel(UART_TX_BRK, base + U_STASET);
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/* disable and clear mode */
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writel(0, base + U_MOD);
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writel(0, base + U_STA);
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/* set baud rate generator */
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writel(div - 1, base + U_BRG);
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/* enable the UART for TX and RX */
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writel(UART_TX_ENABLE | UART_RX_ENABLE, base + U_STASET);
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/* enable the UART */
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writel(UART_ENABLE, base + U_MODSET);
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return 0;
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}
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/* Check whether any char pending in RX fifo */
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static int pic32_uart_pending_input(void __iomem *base)
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{
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/* check if rx buffer overrun error has occurred */
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if (readl(base + U_STA) & UART_RX_OVER) {
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readl(base + U_RXR);
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/* clear overrun error to keep receiving */
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writel(UART_RX_OVER, base + U_STACLR);
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}
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/* In PIC32 there is no way to know number of outstanding
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* chars in rx-fifo. Only it can be known whether there is any.
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*/
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return readl(base + U_STA) & UART_RX_DATA_AVAIL;
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}
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static int pic32_uart_pending(struct udevice *dev, bool input)
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{
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struct pic32_uart_priv *priv = dev_get_priv(dev);
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if (input)
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return pic32_uart_pending_input(priv->base);
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return !(readl(priv->base + U_STA) & UART_TX_EMPTY);
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}
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static int pic32_uart_setbrg(struct udevice *dev, int baudrate)
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{
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struct pic32_uart_priv *priv = dev_get_priv(dev);
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return pic32_serial_init(priv->base, priv->uartclk, baudrate);
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}
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static int pic32_uart_putc(struct udevice *dev, const char ch)
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{
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struct pic32_uart_priv *priv = dev_get_priv(dev);
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/* Check if Tx FIFO is full */
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if (readl(priv->base + U_STA) & UART_TX_FULL)
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return -EAGAIN;
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/* pump the char to tx buffer */
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writel(ch, priv->base + U_TXR);
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return 0;
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}
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static int pic32_uart_getc(struct udevice *dev)
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{
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struct pic32_uart_priv *priv = dev_get_priv(dev);
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/* return error if RX fifo is empty */
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if (!pic32_uart_pending_input(priv->base))
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return -EAGAIN;
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/* read the character from rx buffer */
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return readl(priv->base + U_RXR) & 0xff;
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}
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static int pic32_uart_probe(struct udevice *dev)
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{
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struct pic32_uart_priv *priv = dev_get_priv(dev);
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struct clk clk;
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fdt_addr_t addr;
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fdt_size_t size;
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int ret;
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/* get address */
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addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg",
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&size);
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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priv->base = ioremap(addr, size);
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/* get clock rate */
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret < 0)
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return ret;
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priv->uartclk = clk_get_rate(&clk);
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clk_free(&clk);
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/* initialize serial */
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return pic32_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
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}
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static const struct dm_serial_ops pic32_uart_ops = {
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.putc = pic32_uart_putc,
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.pending = pic32_uart_pending,
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.getc = pic32_uart_getc,
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.setbrg = pic32_uart_setbrg,
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};
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static const struct udevice_id pic32_uart_ids[] = {
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{ .compatible = "microchip,pic32mzda-uart" },
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{}
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};
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U_BOOT_DRIVER(pic32_serial) = {
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.name = "pic32-uart",
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.id = UCLASS_SERIAL,
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.of_match = pic32_uart_ids,
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.probe = pic32_uart_probe,
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.ops = &pic32_uart_ops,
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.flags = DM_FLAG_PRE_RELOC,
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.priv_auto_alloc_size = sizeof(struct pic32_uart_priv),
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};
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#ifdef CONFIG_DEBUG_UART_PIC32
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#include <debug_uart.h>
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static inline void _debug_uart_init(void)
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{
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void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
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pic32_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
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}
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static inline void _debug_uart_putc(int ch)
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{
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writel(ch, CONFIG_DEBUG_UART_BASE + U_TXR);
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}
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DEBUG_UART_FUNCS
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#endif
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