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https://github.com/brain-hackers/u-boot-brain
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c7ba99c8c1
This adds the bare minimum code to support Tegra186, with UART and eMMC working. The empty gpio.h is required because <asm/gpio.h> includes it. A future cleanup round may be able to solve this for all Tegra generations at once. mach-tegra/Makefile is adjusted not to compile anything for Tegra186, but instead to defer everything to mach-tegra/tegra186/Makefile. This allows the SoC code to pick-and-choose which of the C files in the "common" mach-tegra/ directory to compile in based on the SoC's needs. Most of the code is not valid for Tegra186, and this approach removes the need for mach-tegra/Makefile to contain many SoC-specific ifdefs. This approach may be applied to all other Tegra SoCs in a future cleanup round. board186.c is introduced to replace board.c and board2.c. These files currently contain a slew of SoC- and board-specific code that is not valid for Tegra186. This approach avoids adding yet more ifdefs to those files. A future cleanup round may refactor most of board*.c into board-/ SoC-specific functions files thus allowing the top-level functions like board_init_early_f to be shared again. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
57 lines
1.3 KiB
Plaintext
57 lines
1.3 KiB
Plaintext
#include "skeleton.dtsi"
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#include <dt-bindings/gpio/tegra-gpio.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "nvidia,tegra186";
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#address-cells = <2>;
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#size-cells = <2>;
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gpio@2200000 {
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compatible = "nvidia,tegra186-gpio";
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reg-names = "security", "gpio";
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reg =
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<0x0 0x2200000 0x0 0x10000>,
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<0x0 0x2210000 0x0 0x10000>;
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interrupts =
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<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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uarta: serial@3100000 {
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compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
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reg = <0x0 0x03100000 0x0 0x10000>;
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reg-shift = <2>;
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status = "disabled";
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};
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sdhci@3460000 {
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compatible = "nvidia,tegra186-sdhci";
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reg = <0x0 0x03460000 0x0 0x200>;
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interrupts = <GIC_SPI 31 0x04>;
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status = "disabled";
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};
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gpio@c2f0000 {
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compatible = "nvidia,tegra186-gpio-aon";
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reg-names = "security", "gpio";
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reg =
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<0x0 0xc2f0000 0x0 0x1000>,
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<0x0 0xc2f1000 0x0 0x1000>;
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interrupts =
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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