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https://github.com/brain-hackers/u-boot-brain
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fa5e2845a8
This algorithm computes the values of TIMING{0,1,2} registers for the
MX28 I2C block. This algorithm was derived by using a scope, but the
result seems correct.
The resulting values programmed into the registers do not correlate
with the contents in datasheet. When using the values from the datasheet,
the I2C clock were completely wrong.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
/*
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* Freescale i.MX28 Clock
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*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __CLOCK_H__
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#define __CLOCK_H__
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enum mxc_clock {
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MXC_ARM_CLK = 0,
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MXC_AHB_CLK,
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MXC_IPG_CLK,
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MXC_EMI_CLK,
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MXC_GPMI_CLK,
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MXC_IO0_CLK,
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MXC_IO1_CLK,
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MXC_SSP0_CLK,
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MXC_SSP1_CLK,
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MXC_SSP2_CLK,
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MXC_SSP3_CLK,
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MXC_XTAL_CLK,
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};
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enum mxs_ioclock {
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MXC_IOCLK0 = 0,
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MXC_IOCLK1,
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};
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enum mxs_sspclock {
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MXC_SSPCLK0 = 0,
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MXC_SSPCLK1,
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MXC_SSPCLK2,
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MXC_SSPCLK3,
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};
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uint32_t mxc_get_clock(enum mxc_clock clk);
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void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq);
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void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
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void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq);
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/* Compatibility with the FEC Ethernet driver */
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#define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK)
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#endif /* __CLOCK_H__ */
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