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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
6f6b7cfa89
This converts the following to Kconfig: CONFIG_CONS_INDEX We have existing entries for this option in a number of places, with different guards on them. They're also sometimes used for things not directly inside of the serial driver. First, introduce a new symbol to guard the use of CONFIG_CONS_INDEX, so that in the case where we don't need this for the serial driver, but for some other use, we can still do it. Next, consolidate all of these into the single entry in drivers/serial/Kconfig. Finally, introduce CONS_INDEX_[023456] so that we can imply a correct value here to make the defconfig side of this smaller. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rework a lot of the logic here, such that I took authorship from Adam, but kept his S-o-B line] Signed-off-by: Tom Rini <trini@konsulko.com>
175 lines
4.8 KiB
C
175 lines
4.8 KiB
C
/*
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* Copyright (C) 2010 Heiko Schocher <hs@denx.de>
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*
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* based on:
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* Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __IMX27LITE_COMMON_CONFIG_H
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#define __IMX27LITE_COMMON_CONFIG_H
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/*
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* SoC Configuration
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*/
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#define CONFIG_MX27
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#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Lowlevel configuration
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*/
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#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
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(ESDCFG_TRC(10) | \
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ESDCFG_TRCD(3) | \
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ESDCFG_TCAS(cas) | \
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ESDCFG_TRRD(1) | \
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ESDCFG_TRAS(5) | \
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ESDCFG_TWR | \
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ESDCFG_TMRD(2) | \
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ESDCFG_TRP(2) | \
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ESDCFG_TXP(3))
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#define SDRAM_ESDCTL_REGISTER_VAL \
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(ESDCTL_PRCT(0) | \
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ESDCTL_BL | \
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ESDCTL_PWDT(0) | \
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ESDCTL_SREFR(3) | \
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ESDCTL_DSIZ_32 | \
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ESDCTL_COL10 | \
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ESDCTL_ROW13 | \
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ESDCTL_SDE)
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#define SDRAM_ALL_VAL 0xf00
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#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
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#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
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#define MPCTL0_VAL 0x1ef15d5
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#define SPCTL0_VAL 0x043a1c09
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#define CSCR_VAL 0x33f08107
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#define PCDR0_VAL 0x120470c3
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#define PCDR1_VAL 0x03030303
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#define PCCR0_VAL 0xffffffff
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#define PCCR1_VAL 0xfffffffc
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#define AIPI1_PSR0_VAL 0x20040304
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#define AIPI1_PSR1_VAL 0xdffbfcfb
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#define AIPI2_PSR0_VAL 0x07ffc200
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#define AIPI2_PSR1_VAL 0xffffffff
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/*
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* Memory Info
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*/
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/* malloc() len */
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#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
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/* memtest start address */
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#define CONFIG_SYS_MEMTEST_START 0xA0000000
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#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
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#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
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/*
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* Serial Driver info
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/*
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* Flash & Environment
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*/
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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/* Use buffered writes (~10x faster) */
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
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/* Use hardware sector protection */
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#define CONFIG_SYS_FLASH_PROTECTION 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
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/* CS2 Base address */
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#define PHYS_FLASH_1 0xc0000000
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/* Flash Base for U-Boot */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
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CONFIG_SYS_FLASH_SECT_SZ)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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/* Address and size of Redundant Environment Sector */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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/*
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* Ethernet
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*/
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0x1f
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#define CONFIG_MII
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/*
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* MTD
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*/
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#define CONFIG_FLASH_CFI_MTD
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#define CONFIG_MTD_DEVICE
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/*
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* NAND
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*/
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#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0xd8000000
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#define CONFIG_JFFS2_NAND
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#define CONFIG_MXC_NAND_HWECC
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/*
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* U-Boot general configuration
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*/
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addtty=setenv bootargs ${bootargs}" \
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" console=ttymxc0,${baudrate}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"addmisc=setenv bootargs ${bootargs}\0" \
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"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
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"kernel_addr_r=a0800000\0" \
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"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
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"rootpath=/opt/eldk-4.2-arm/arm\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
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"run nfsargs addip addtty addmtd addmisc;" \
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"bootm\0" \
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"bootcmd=run net_nfs\0" \
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"load=tftp ${loadaddr} ${u-boot}\0" \
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"update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \
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" +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
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" +${filesize};cp.b ${fileaddr} " \
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__stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
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"upd=run load update\0" \
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"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
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"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
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GENERATED_GBL_DATA_SIZE)
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#endif /* __IMX27LITE_COMMON_CONFIG_H */
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