u-boot-brain/arch/powerpc/cpu
Prabhakar Kushwaha b03a466d6c powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs
The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe.  Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-03-29 07:41:37 -05:00
..
74xx_7xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc5xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc5xxx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc8xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc8xxx powerpc/mpc8xxx: disable rcw_en bit for non-DDR3 2011-03-24 09:20:50 -05:00
mpc83xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc85xx powerpc/85xx: Handle PCIe initialization requires for P1021 class SoCs 2011-03-29 07:41:37 -05:00
mpc86xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc512x rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc824x rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc8220 rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
mpc8260 rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00
ppc4xx rename _end to __bss_end__ 2011-03-27 19:18:37 +02:00