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![Matt Waddel](/assets/img/avatar_default.png)
Adds support for the ARM quad-core Cortex-A9 processor This system includes a motherboard(Versatile Express), daughterboard (Coretile), and SOC(Cortex-A9 quad core). The serial port, ethernet, and flash systems work with these additions. The naming convention is: SOC -> CortexA9 quad core = ca9x4 daughterboard -> Coretile = ct motherboard -> Versatile Express = vxp This gives ca9x4_ct_vxp.c as the board support file. Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
/*
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* (C) Copyright 2010
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* Matt Waddel, <matt.waddel@linaro.org>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _WDT_H_
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#define _WDT_H_
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/* Watchdog timer (SP805) register base address */
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#define WDT_BASE 0x100E5000
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#define WDT_EN 0x2
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#define WDT_RESET_LOAD 0x0
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struct wdt {
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u32 wdogload; /* 0x000 */
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u32 wdogvalue;
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u32 wdogcontrol;
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u32 wdogintclr;
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u32 wdogris;
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u32 wdogmis;
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u32 res1[0x2F9];
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u32 wdoglock; /* 0xC00 */
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u32 res2[0xBE];
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u32 wdogitcr; /* 0xF00 */
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u32 wdogitop;
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u32 res3[0x35];
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u32 wdogperiphid0; /* 0xFE0 */
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u32 wdogperiphid1;
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u32 wdogperiphid2;
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u32 wdogperiphid3;
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u32 wdogpcellid0;
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u32 wdogpcellid1;
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u32 wdogpcellid2;
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u32 wdogpcellid3;
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};
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#endif /* _WDT_H_ */
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