mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
67 lines
2.4 KiB
C
67 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
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*
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* Based on original Kirkwood support which is
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*
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* Header file for Marvell's Orion SoC with Feroceon CPU core.
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*/
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#ifndef _ASM_ARCH_ORION5X_H
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#define _ASM_ARCH_ORION5X_H
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#if defined(CONFIG_FEROCEON)
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/* SOC specific definations */
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#define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x)
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/* Documented registers */
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#define ORION5X_DRAM_BASE (ORION5X_REGISTER(0x01500))
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#define ORION5X_TWSI_BASE (ORION5X_REGISTER(0x11000))
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#define ORION5X_UART0_BASE (ORION5X_REGISTER(0x12000))
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#define ORION5X_UART1_BASE (ORION5X_REGISTER(0x12100))
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#define ORION5X_MPP_BASE (ORION5X_REGISTER(0x10000))
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#define ORION5X_GPIO_BASE (ORION5X_REGISTER(0x10100))
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#define ORION5X_CPU_WIN_BASE (ORION5X_REGISTER(0x20000))
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#define ORION5X_CPU_REG_BASE (ORION5X_REGISTER(0x20100))
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#define ORION5X_TIMER_BASE (ORION5X_REGISTER(0x20300))
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#define ORION5X_REG_PCI_BASE (ORION5X_REGISTER(0x30000))
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#define ORION5X_REG_PCIE_BASE (ORION5X_REGISTER(0x40000))
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#define ORION5X_USB20_PORT0_BASE (ORION5X_REGISTER(0x50000))
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#define ORION5X_USB20_PORT1_BASE (ORION5X_REGISTER(0xA0000))
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#define ORION5X_EGIGA_BASE (ORION5X_REGISTER(0x72000))
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#define ORION5X_SATA_BASE (ORION5X_REGISTER(0x80000))
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#define ORION5X_SATA_PORT0_OFFSET 0x2000
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#define ORION5X_SATA_PORT1_OFFSET 0x4000
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/* Orion5x GbE controller has a single port */
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#define MAX_MVGBE_DEVS 1
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#define MVGBE0_BASE ORION5X_EGIGA_BASE
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/* Orion5x USB Host controller is port 1 */
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#define MVUSB0_BASE ORION5X_USB20_HOST_PORT_BASE
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#define MVUSB0_CPU_ATTR_DRAM_CS0 ORION5X_ATTR_DRAM_CS0
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#define MVUSB0_CPU_ATTR_DRAM_CS1 ORION5X_ATTR_DRAM_CS1
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#define MVUSB0_CPU_ATTR_DRAM_CS2 ORION5X_ATTR_DRAM_CS2
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#define MVUSB0_CPU_ATTR_DRAM_CS3 ORION5X_ATTR_DRAM_CS3
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/* Kirkwood CPU memory windows */
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#define MVCPU_WIN_CTRL_DATA ORION5X_CPU_WIN_CTRL_DATA
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#define MVCPU_WIN_ENABLE ORION5X_WIN_ENABLE
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#define MVCPU_WIN_DISABLE ORION5X_WIN_DISABLE
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#define CONFIG_MAX_RAM_BANK_SIZE (64*1024*1024)
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/* include here SoC variants. 5181, 5281, 6183 should go here when
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adding support for them, and this comment should then be updated. */
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#if defined(CONFIG_88F5182)
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#include <asm/arch/mv88f5182.h>
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#else
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#error "SOC Name not defined"
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#endif
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#endif /* CONFIG_FEROCEON */
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#endif /* _ASM_ARCH_ORION5X_H */
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