mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
101 lines
3.3 KiB
C
101 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*/
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#ifndef ST_SMI_H
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#define ST_SMI_H
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/* 0xF800.0000 . 0xFBFF.FFFF 64MB SMI (Serial Flash Mem) */
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/* 0xFC00.0000 . 0xFC1F.FFFF 2MB SMI (Serial Flash Reg.) */
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#define FLASH_START_ADDRESS CONFIG_SYS_FLASH_BASE
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#define FLASH_BANK_SIZE CONFIG_SYS_FLASH_BANK_SIZE
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#define SMIBANK0_BASE (FLASH_START_ADDRESS)
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#define SMIBANK1_BASE (SMIBANK0_BASE + FLASH_BANK_SIZE)
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#define SMIBANK2_BASE (SMIBANK1_BASE + FLASH_BANK_SIZE)
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#define SMIBANK3_BASE (SMIBANK2_BASE + FLASH_BANK_SIZE)
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#define BANK0 0
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#define BANK1 1
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#define BANK2 2
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#define BANK3 3
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struct smi_regs {
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u32 smi_cr1;
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u32 smi_cr2;
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u32 smi_sr;
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u32 smi_tr;
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u32 smi_rr;
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};
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/* CONTROL REG 1 */
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#define BANK_EN 0x0000000F /* enables all banks */
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#define DSEL_TIME 0x00000060 /* Deselect time */
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#define PRESCAL5 0x00000500 /* AHB_CK prescaling value */
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#define PRESCALA 0x00000A00 /* AHB_CK prescaling value */
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#define PRESCAL3 0x00000300 /* AHB_CK prescaling value */
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#define PRESCAL4 0x00000400 /* AHB_CK prescaling value */
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#define SW_MODE 0x10000000 /* enables SW Mode */
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#define WB_MODE 0x20000000 /* Write Burst Mode */
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#define FAST_MODE 0x00008000 /* Fast Mode */
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#define HOLD1 0x00010000
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/* CONTROL REG 2 */
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#define RD_STATUS_REG 0x00000400 /* reads status reg */
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#define WE 0x00000800 /* Write Enable */
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#define BANK0_SEL 0x00000000 /* Select Banck0 */
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#define BANK1_SEL 0x00001000 /* Select Banck1 */
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#define BANK2_SEL 0x00002000 /* Select Banck2 */
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#define BANK3_SEL 0x00003000 /* Select Banck3 */
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#define BANKSEL_SHIFT 12
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#define SEND 0x00000080 /* Send data */
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#define TX_LEN_1 0x00000001 /* data length = 1 byte */
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#define TX_LEN_2 0x00000002 /* data length = 2 byte */
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#define TX_LEN_3 0x00000003 /* data length = 3 byte */
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#define TX_LEN_4 0x00000004 /* data length = 4 byte */
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#define RX_LEN_1 0x00000010 /* data length = 1 byte */
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#define RX_LEN_2 0x00000020 /* data length = 2 byte */
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#define RX_LEN_3 0x00000030 /* data length = 3 byte */
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#define RX_LEN_4 0x00000040 /* data length = 4 byte */
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#define TFIE 0x00000100 /* Tx Flag Interrupt Enable */
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#define WCIE 0x00000200 /* WCF Interrupt Enable */
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/* STATUS_REG */
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#define INT_WCF_CLR 0xFFFFFDFF /* clear: WCF clear */
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#define INT_TFF_CLR 0xFFFFFEFF /* clear: TFF clear */
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#define WIP_BIT 0x00000001 /* WIP Bit of SPI SR */
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#define WEL_BIT 0x00000002 /* WEL Bit of SPI SR */
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#define RSR 0x00000005 /* Read Status regiser */
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#define TFF 0x00000100 /* Transfer Finished FLag */
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#define WCF 0x00000200 /* Transfer Finished FLag */
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#define ERF1 0x00000400 /* Error Flag 1 */
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#define ERF2 0x00000800 /* Error Flag 2 */
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#define WM0 0x00001000 /* WM Bank 0 */
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#define WM1 0x00002000 /* WM Bank 1 */
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#define WM2 0x00004000 /* WM Bank 2 */
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#define WM3 0x00008000 /* WM Bank 3 */
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#define WM_SHIFT 12
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/* TR REG */
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#define READ_ID 0x0000009F /* Read Identification */
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#define BULK_ERASE 0x000000C7 /* BULK erase */
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#define SECTOR_ERASE 0x000000D8 /* SECTOR erase */
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#define WRITE_ENABLE 0x00000006 /* Wenable command to FLASH */
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struct flash_dev {
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u32 density;
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ulong size;
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ushort sector_count;
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};
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#define SFLASH_PAGE_SIZE 0x100 /* flash page size */
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#define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */
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#define WMODE_TOUT 15 /* write enable timeout(in ms) */
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extern void smi_init(void);
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#endif
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