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![]() Remove rev 1 fixes. Always set PICGCR_MODE. Enable machine check and provide board config option to set and handle SoC error interrupts. Include MSSSR0 in error message. Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> |
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.. | ||
cache.S | ||
config.mk | ||
cpu_init.c | ||
cpu.c | ||
interrupts.c | ||
Makefile | ||
spd_sdram.c | ||
speed.c | ||
start.S | ||
traps.c |