mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
86cf1c8285
We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Board configuration file for Bubblegum-96
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*
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* Copyright (C) 2015 Actions Semi Co., Ltd.
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* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*
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*/
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#ifndef _BUBBLEGUM_96_H_
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#define _BUGGLEGUM_96_H_
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/* SDRAM Definitions */
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#define CONFIG_SYS_SDRAM_BASE 0x0
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#define CONFIG_SYS_SDRAM_SIZE 0x80000000
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (24000000) /* 24MHz */
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#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
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/* Some commands use this as the default load address */
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0)
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/*
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* This is the initial SP which is used only briefly for relocating the u-boot
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* image to the top of SDRAM. After relocation u-boot moves the stack to the
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* proper place.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
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/* UART Definitions */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_ENV_SIZE 0x2000
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/* Console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#endif
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