mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
6d82517836
Now that new SPI NOR layer uses stateless 4 byte opcodes by default, don't enable SPI_FLASH_BAR. For SPI controllers that cannot support 4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c, renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to not break functionality. Signed-off-by: Vignesh R <vigneshr@ti.com> Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
41 lines
898 B
Plaintext
41 lines
898 B
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_MX28=y
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CONFIG_SYS_TEXT_BASE=0x40002000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_TARGET_BG0900=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0,115200"
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CONFIG_VERSION_VARIABLE=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_BOARD_EARLY_INIT_F=y
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# CONFIG_SPL_FRAMEWORK is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_NAND_TRIMFFS=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_DOS_PARTITION=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_MXS=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_SPI=y
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CONFIG_MXS_SPI=y
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CONFIG_OF_LIBFDT=y
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