mirror of
https://github.com/brain-hackers/u-boot-brain
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28 lines
649 B
C
28 lines
649 B
C
/*
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* Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* P5020 DS board configuration file
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* Also supports P5010 DS
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*/
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#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */
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#define CONFIG_MMC
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#define CONFIG_NAND_FSL_ELBC
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#define CONFIG_FSL_SATA_V2
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#define CONFIG_PCIE3
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#define CONFIG_PCIE4
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#define CONFIG_SYS_FSL_RAID_ENGINE
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#define CONFIG_SYS_DPAA_RMAN
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_SRIO2 /* SRIO port 2 */
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#define CONFIG_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
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#include "corenet_ds.h"
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