mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 22:26:16 +09:00
03544c6640
The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
262 lines
7.5 KiB
C
262 lines
7.5 KiB
C
/*
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* Config file for Compulab CM-FX6 board
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*
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* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
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*
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* Author: Nikita Kiryanov <nikita@compulab.co.il>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_CM_FX6_H
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#define __CONFIG_CM_FX6_H
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#include "mx6_common.h"
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/* Machine config */
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#define CONFIG_SYS_LITTLE_ENDIAN
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#define CONFIG_MACH_TYPE 4273
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/* CMD */
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#define CONFIG_CMD_GREPENV
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/* MMC */
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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/* RAM */
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#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_NR_DRAM_BANKS 2
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Serial console */
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART4_BASE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
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/* Shell */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* SPI flash */
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 25000000
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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/* Environment */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"stdin=serial,usbkbd\0" \
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"stdout=serial,vga\0" \
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"stderr=serial,vga\0" \
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"panel=HDMI\0" \
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"autoload=no\0" \
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"kernel=uImage-cm-fx6\0" \
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"script=boot.scr\0" \
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"dtb=cm-fx6.dtb\0" \
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"bootm_low=18000000\0" \
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"loadaddr=0x10800000\0" \
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"fdtaddr=0x11000000\0" \
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"console=ttymxc3,115200\0" \
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"ethprime=FEC0\0" \
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"video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \
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"video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \
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"doboot=bootm ${loadaddr}\0" \
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"doloadfdt=false\0" \
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"setboottypez=setenv kernel zImage-cm-fx6;" \
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"setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
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"setenv doloadfdt true;\0" \
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"setboottypem=setenv kernel uImage-cm-fx6;" \
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"setenv doboot bootm ${loadaddr};" \
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"setenv doloadfdt false;\0"\
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"mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
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"sataroot=/dev/sda2 rw rootwait\0" \
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"nandroot=/dev/mtdblock4 rw\0" \
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"nandrootfstype=ubifs\0" \
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"mmcargs=setenv bootargs console=${console} root=${mmcroot} " \
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"${video}\0" \
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"sataargs=setenv bootargs console=${console} root=${sataroot} " \
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"${video}\0" \
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"nandargs=setenv bootargs console=${console} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype} " \
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"${video}\0" \
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"nandboot=if run nandloadkernel; then " \
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"run nandloadfdt;" \
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"run setboottypem;" \
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"run storagebootcmd;" \
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"run setboottypez;" \
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"run storagebootcmd;" \
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"fi;\0" \
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"run_eboot=echo Starting EBOOT ...; "\
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"mmc dev 2 && " \
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"mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
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"loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0"\
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"loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0"\
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"loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${dtb};\0" \
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"bootscript=echo Running bootscript from ${storagetype} ...;" \
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"source ${loadaddr};\0" \
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"nandloadkernel=nand read ${loadaddr} 0 780000;\0" \
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"nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
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"setupmmcboot=setenv storagetype mmc; setenv storagedev 2;\0" \
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"setupsataboot=setenv storagetype sata; setenv storagedev 0;\0" \
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"setupnandboot=setenv storagetype nand;\0" \
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"setupusbboot=setenv storagetype usb; setenv storagedev 0;\0" \
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"storagebootcmd=echo Booting from ${storagetype} ...;" \
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"run ${storagetype}args; run doboot;\0" \
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"trybootk=if run loadkernel; then " \
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"if ${doloadfdt}; then " \
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"run loadfdt;" \
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"fi;" \
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"run storagebootcmd;" \
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"fi;\0" \
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"trybootsmz=if run loadscript; then " \
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"run bootscript;" \
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"fi;" \
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"run setboottypem;" \
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"run trybootk;" \
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"run setboottypez;" \
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"run trybootk;\0"
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#define CONFIG_BOOTCOMMAND \
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"run setupmmcboot;" \
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"mmc dev ${storagedev};" \
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"if mmc rescan; then " \
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"run trybootsmz;" \
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"fi;" \
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"run setupusbboot;" \
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"if usb start; then "\
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"if run loadscript; then " \
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"run bootscript;" \
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"fi;" \
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"fi;" \
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"run setupsataboot;" \
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"if sata init; then " \
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"run trybootsmz;" \
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"fi;" \
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"run setupnandboot;" \
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"run nandboot;"
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#define CONFIG_PREBOOT "usb start"
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/* SPI */
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#define CONFIG_SPI
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#define CONFIG_MXC_SPI
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/* NAND */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_NAND
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* APBH DMA is required for NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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#endif
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/* Ethernet */
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ATHEROS
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#define CONFIG_MII
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#define CONFIG_ETHPRIME "FEC0"
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#define CONFIG_ARP_TIMEOUT 200UL
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#define CONFIG_NET_RETRY_COUNT 5
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/* USB */
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
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#define CONFIG_SYS_STDIO_DEREGISTER
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_MXC_I2C3_SPEED 400000
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_BUS 2
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/* SATA */
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#define CONFIG_CMD_SATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_LIBATA
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#define CONFIG_LBA48
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#define CONFIG_DWC_AHSATA
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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/* Boot */
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
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#define CONFIG_SERIAL_TAG
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/* misc */
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#define CONFIG_STACKSIZE (128 * 1024)
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
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#define CONFIG_OF_BOARD_SETUP
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#define CONFIG_MISC_INIT_R
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/* SPL */
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#include "imx6_spl.h"
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
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#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
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#define CONFIG_SPL_SPI_LOAD
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/* Display */
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#define CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_IPUV3_CLK 260000000
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#define CONFIG_IMX_HDMI
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SOURCE
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#define CONFIG_CMD_BMP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#endif /* __CONFIG_CM_FX6_H */
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