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https://github.com/brain-hackers/u-boot-brain
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This patch adds ethernet gmac node for MT7623 with MT7530 gigabit switch. Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
221 lines
3.9 KiB
Plaintext
221 lines
3.9 KiB
Plaintext
/*
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* Copyright (C) 2018 MediaTek Inc.
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* Author: Ryder Lee <ryder.lee@mediatek.com>
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*
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* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*/
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/dts-v1/;
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#include "mt7623.dtsi"
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/ {
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model = "Bananapi BPI-R2";
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compatible = "bananapi,bpi-r2", "mediatek,mt7623";
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chosen {
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stdout-path = &uart2;
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tick-timer = &timer0;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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leds {
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compatible = "gpio-leds";
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blue {
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label = "bpi-r2:pio:blue";
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gpios = <&gpio 241 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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green {
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label = "bpi-r2:pio:green";
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gpios = <&gpio 240 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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red {
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label = "bpi-r2:pio:red";
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gpios = <&gpio 239 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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ð {
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status = "okay";
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mediatek,gmac-id = <0>;
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phy-mode = "rgmii";
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mediatek,switch = "mt7530";
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reset-gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins_default>;
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status = "okay";
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bus-width = <8>;
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max-frequency = <50000000>;
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cap-mmc-highspeed;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins_default>;
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status = "okay";
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bus-width = <4>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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cd-gpios = <&gpio 261 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_3p3v>;
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};
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&pinctrl {
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ephy_default: ephy_default {
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mux {
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function = "eth";
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groups = "mdc_mdio", "ephy";
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};
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conf {
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pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
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"G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
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"G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
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"MDC", "MDIO";
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drive-strength = <12>;
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mediatek,tdsel = <5>;
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};
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};
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mmc0_pins_default: mmc0default {
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mux {
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function = "msdc";
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groups = "msdc0";
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};
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conf-cmd-data {
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pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
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"MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
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"MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
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input-enable;
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bias-pull-up;
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};
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conf-clk {
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pins = "MSDC0_CLK";
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bias-pull-down;
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};
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conf-rst {
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pins = "MSDC0_RSTB";
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bias-pull-up;
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};
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};
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mmc1_pins_default: mmc1default {
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mux {
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function = "msdc";
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groups = "msdc1", "msdc1_wp_0";
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};
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conf-cmd-data {
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pins = "MSDC1_DAT0", "MSDC1_DAT1", "MSDC1_DAT2",
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"MSDC1_DAT3", "MSDC1_DAT3", "MSDC1_CMD";
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input-enable;
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drive-strength = <4>;
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bias-pull-up;
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};
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conf-clk {
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pins = "MSDC1_CLK";
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drive-strength = <4>;
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};
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conf-wp {
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pins = "EINT7";
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input-enable;
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bias-pull-up;
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};
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};
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uart0_pins_a: uart0-default {
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mux {
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function = "uart";
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groups = "uart0_0_txd_rxd";
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};
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};
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uart1_pins_a: uart1-default {
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mux {
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function = "uart";
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groups = "uart1_0_txd_rxd";
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};
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};
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uart2_pins_a: uart2-default {
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mux {
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function = "uart";
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groups = "uart2_0_txd_rxd";
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};
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};
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uart2_pins_b: uart2-alt {
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mux {
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function = "uart";
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groups = "uart2_1_txd_rxd";
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_a>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins_a>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins_a>;
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status = "okay";
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};
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