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https://github.com/brain-hackers/u-boot-brain
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6cadaa046b
For the peripheral clock, provide the clock ops for the clock provider, such as spi0_clk. The .of_xlate is to get the clk->id, the .enable is to enable the spi0 peripheral clock, the .get_rate is to get the clock frequency. The driver for periph32ck node is responsible for recursively binding its children as clk devices, not provide the clock ops. So do the generated clock and system clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Stephen Warren <swarren@nvidia.com>
114 lines
2.4 KiB
C
114 lines
2.4 KiB
C
/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm/device.h>
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#include <dm/lists.h>
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#include <dm/root.h>
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#include "pmc.h"
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DECLARE_GLOBAL_DATA_PTR;
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static const struct udevice_id at91_pmc_match[] = {
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{ .compatible = "atmel,sama5d2-pmc" },
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{}
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};
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U_BOOT_DRIVER(at91_pmc) = {
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.name = "at91-pmc",
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.id = UCLASS_SIMPLE_BUS,
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.of_match = at91_pmc_match,
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};
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/*---------------------------------------------------------*/
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int at91_pmc_core_probe(struct udevice *dev)
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{
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struct pmc_platdata *plat = dev_get_platdata(dev);
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dev = dev_get_parent(dev);
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plat->reg_base = (struct at91_pmc *)dev_get_addr_ptr(dev);
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return 0;
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}
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/**
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* at91_clk_sub_device_bind() - for the at91 clock driver
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* Recursively bind its children as clk devices.
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*
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* @return: 0 on success, or negative error code on failure
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*/
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int at91_clk_sub_device_bind(struct udevice *dev, const char *drv_name)
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{
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const void *fdt = gd->fdt_blob;
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int offset = dev->of_offset;
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bool pre_reloc_only = !(gd->flags & GD_FLG_RELOC);
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const char *name;
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int ret;
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for (offset = fdt_first_subnode(fdt, offset);
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offset > 0;
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offset = fdt_next_subnode(fdt, offset)) {
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if (pre_reloc_only &&
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!fdt_getprop(fdt, offset, "u-boot,dm-pre-reloc", NULL))
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continue;
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/*
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* If this node has "compatible" property, this is not
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* a clock sub-node, but a normal device. skip.
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*/
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fdt_get_property(fdt, offset, "compatible", &ret);
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if (ret >= 0)
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continue;
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if (ret != -FDT_ERR_NOTFOUND)
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return ret;
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name = fdt_get_name(fdt, offset, NULL);
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if (!name)
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return -EINVAL;
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ret = device_bind_driver_to_node(dev, drv_name, name,
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offset, NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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int at91_clk_of_xlate(struct clk *clk, struct fdtdec_phandle_args *args)
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{
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int periph;
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if (args->args_count) {
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debug("Invalid args_count: %d\n", args->args_count);
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return -EINVAL;
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}
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periph = fdtdec_get_uint(gd->fdt_blob, clk->dev->of_offset, "reg", -1);
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if (periph < 0)
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return -EINVAL;
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clk->id = periph;
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return 0;
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}
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int at91_clk_probe(struct udevice *dev)
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{
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struct udevice *dev_periph_container, *dev_pmc;
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struct pmc_platdata *plat = dev_get_platdata(dev);
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dev_periph_container = dev_get_parent(dev);
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dev_pmc = dev_get_parent(dev_periph_container);
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plat->reg_base = (struct at91_pmc *)dev_get_addr_ptr(dev_pmc);
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return 0;
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}
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