mirror of
https://github.com/brain-hackers/u-boot-brain
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6c9a9df9f5
Use "snps,dwc2" for compatible name and and common variable names so that we can share the common code for all SoCs. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
70 lines
1.3 KiB
C
70 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <asm/armv8/mmu.h>
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#include <dwc3-uboot.h>
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#include <power/regulator.h>
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#include <usb.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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int ret;
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ret = regulators_enable_boot_on(false);
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if (ret)
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debug("%s: Cannot enable boot on regulator\n", __func__);
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return ret;
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}
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#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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static struct dwc2_plat_otg_data otg_data = {
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.rx_fifo_sz = 512,
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.np_tx_fifo_sz = 16,
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.tx_fifo_sz = 128,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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int node;
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const char *mode;
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bool matched = false;
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const void *blob = gd->fdt_blob;
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/* find the usb_otg node */
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node = fdt_node_offset_by_compatible(blob, -1,
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"snps,dwc2");
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while (node > 0) {
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mode = fdt_getprop(blob, node, "dr_mode", NULL);
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if (mode && strcmp(mode, "otg") == 0) {
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matched = true;
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break;
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}
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node = fdt_node_offset_by_compatible(blob, node,
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"snps,dwc2");
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}
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if (!matched) {
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debug("Not found usb_otg device\n");
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return -ENODEV;
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}
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otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
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return dwc2_udc_probe(&otg_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif
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