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![]() This patch contains several changes required for second Ethernet (enet1/RMII1) port on vf610 - ANADIG PLL5 control definitions required for Ethernet RMII1 clock - Secondary Ethernet (enet1) MAC RMII1 base address definition - RMII1 iomux definitions - VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for internal (e.g. crystal-less) Ethernet clocking. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch> |
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arc | ||
arm | ||
avr32 | ||
blackfin | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
openrisc | ||
powerpc | ||
sandbox | ||
sh | ||
sparc | ||
x86 | ||
.gitignore |