mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
255 lines
6.2 KiB
C
255 lines
6.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
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*
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* Based on Kirkwood support:
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <environment.h>
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#include <i2c.h>
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#include <asm/mach-types.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/soc.h>
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#include <asm/arch/mpp.h>
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#include <asm/arch/gpio.h>
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#include "net2big_v2.h"
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#include "../common/common.h"
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#include "../common/cpld-gpio-bus.h"
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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/* GPIO configuration */
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mvebu_config_gpio(NET2BIG_V2_OE_VAL_LOW, NET2BIG_V2_OE_VAL_HIGH,
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NET2BIG_V2_OE_LOW, NET2BIG_V2_OE_HIGH);
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/* Multi-Purpose Pins Functionality configuration */
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static const u32 kwmpp_config[] = {
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MPP0_SPI_SCn,
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MPP1_SPI_MOSI,
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MPP2_SPI_SCK,
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MPP3_SPI_MISO,
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MPP6_SYSRST_OUTn,
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MPP7_GPO, /* Request power-off */
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MPP8_TW_SDA,
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MPP9_TW_SCK,
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MPP10_UART0_TXD,
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MPP11_UART0_RXD,
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MPP13_GPIO, /* Rear power switch (on|auto) */
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MPP14_GPIO, /* USB fuse alarm */
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MPP15_GPIO, /* Rear power switch (auto|off) */
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MPP16_GPIO, /* SATA HDD1 power */
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MPP17_GPIO, /* SATA HDD2 power */
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MPP20_SATA1_ACTn,
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MPP21_SATA0_ACTn,
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MPP24_GPIO, /* USB mode select */
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MPP26_GPIO, /* USB device vbus */
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MPP28_GPIO, /* USB enable host vbus */
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MPP29_GPIO, /* CPLD GPIO bus ALE */
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MPP34_GPIO, /* Rear Push button 0=on 1=off */
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MPP35_GPIO, /* Inhibit switch power-off */
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MPP36_GPIO, /* SATA HDD1 presence */
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MPP37_GPIO, /* SATA HDD2 presence */
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MPP40_GPIO, /* eSATA presence */
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MPP44_GPIO, /* CPLD GPIO bus (data 0) */
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MPP45_GPIO, /* CPLD GPIO bus (data 1) */
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MPP46_GPIO, /* CPLD GPIO bus (data 2) */
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MPP47_GPIO, /* CPLD GPIO bus (addr 0) */
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MPP48_GPIO, /* CPLD GPIO bus (addr 1) */
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MPP49_GPIO, /* CPLD GPIO bus (addr 2) */
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0
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};
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kirkwood_mpp_conf(kwmpp_config, NULL);
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return 0;
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}
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int board_init(void)
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{
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/* Machine number */
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gd->bd->bi_arch_number = MACH_TYPE_NET2BIG_V2;
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/* Boot parameters address */
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gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
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return 0;
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}
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#if defined(CONFIG_MISC_INIT_R)
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_G762_ADDR)
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/*
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* Start I2C fan (GMT G762 controller)
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*/
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static void init_fan(void)
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{
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u8 data;
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i2c_set_bus_num(0);
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/* Enable open-loop and PWM modes */
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data = 0x20;
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if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
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G762_REG_FAN_CMD1, 1, &data, 1) != 0)
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goto err;
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data = 0;
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if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
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G762_REG_SET_CNT, 1, &data, 1) != 0)
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goto err;
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/*
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* RPM to PWM (set_out register) fan speed conversion array:
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* 0 0x00
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* 1500 0x04
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* 2800 0x08
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* 3400 0x0C
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* 3700 0x10
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* 4400 0x20
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* 4700 0x30
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* 4800 0x50
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* 5200 0x80
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* 5400 0xC0
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* 5500 0xFF
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*
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* Start fan at low speed (2800 RPM):
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*/
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data = 0x08;
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if (i2c_write(CONFIG_SYS_I2C_G762_ADDR,
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G762_REG_SET_OUT, 1, &data, 1) != 0)
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goto err;
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return;
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err:
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printf("Error: failed to start I2C fan @%02x\n",
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CONFIG_SYS_I2C_G762_ADDR);
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}
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#else
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static void init_fan(void) {}
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#endif /* CONFIG_CMD_I2C && CONFIG_SYS_I2C_G762_ADDR */
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#if defined(CONFIG_NET2BIG_V2) && defined(CONFIG_KIRKWOOD_GPIO)
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/*
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* CPLD GPIO bus:
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*
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* - address register : bit [0-2] -> GPIO [47-49]
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* - data register : bit [0-2] -> GPIO [44-46]
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* - enable register : GPIO 29
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*/
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static unsigned cpld_gpio_bus_addr[] = { 47, 48, 49 };
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static unsigned cpld_gpio_bus_data[] = { 44, 45, 46 };
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static struct cpld_gpio_bus cpld_gpio_bus = {
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.addr = cpld_gpio_bus_addr,
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.num_addr = ARRAY_SIZE(cpld_gpio_bus_addr),
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.data = cpld_gpio_bus_data,
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.num_data = ARRAY_SIZE(cpld_gpio_bus_data),
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.enable = 29,
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};
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/*
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* LEDs configuration:
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*
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* The LEDs are controlled by a CPLD and can be configured through
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* the CPLD GPIO bus.
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*
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* Address register selection:
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*
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* addr | register
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* ----------------------------
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* 0 | front LED
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* 1 | front LED brightness
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* 2 | SATA LED brightness
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* 3 | SATA0 LED
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* 4 | SATA1 LED
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* 5 | SATA2 LED
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* 6 | SATA3 LED
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* 7 | SATA4 LED
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*
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* Data register configuration:
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*
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* data | LED brightness
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* -------------------------------------------------
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* 0 | min (off)
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* - | -
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* 7 | max
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*
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* data | front LED mode
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* -------------------------------------------------
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* 0 | fix off
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* 1 | fix blue on
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* 2 | fix red on
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* 3 | blink blue on=1 sec and blue off=1 sec
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* 4 | blink red on=1 sec and red off=1 sec
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* 5 | blink blue on=2.5 sec and red on=0.5 sec
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* 6 | blink blue on=1 sec and red on=1 sec
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* 7 | blink blue on=0.5 sec and blue off=2.5 sec
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*
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* data | SATA LED mode
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* -------------------------------------------------
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* 0 | fix off
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* 1 | SATA activity blink
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* 2 | fix red on
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* 3 | blink blue on=1 sec and blue off=1 sec
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* 4 | blink red on=1 sec and red off=1 sec
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* 5 | blink blue on=2.5 sec and red on=0.5 sec
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* 6 | blink blue on=1 sec and red on=1 sec
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* 7 | fix blue on
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*/
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static void init_leds(void)
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{
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/* Enable the front blue LED */
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cpld_gpio_bus_write(&cpld_gpio_bus, 0, 1);
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cpld_gpio_bus_write(&cpld_gpio_bus, 1, 3);
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/* Configure SATA LEDs to blink in relation with the SATA activity */
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cpld_gpio_bus_write(&cpld_gpio_bus, 3, 1);
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cpld_gpio_bus_write(&cpld_gpio_bus, 4, 1);
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cpld_gpio_bus_write(&cpld_gpio_bus, 2, 3);
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}
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#else
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static void init_leds(void) {}
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#endif /* CONFIG_NET2BIG_V2 && CONFIG_KIRKWOOD_GPIO */
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int misc_init_r(void)
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{
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init_fan();
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#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
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if (!env_get("ethaddr")) {
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uchar mac[6];
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if (lacie_read_mac_address(mac) == 0)
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eth_env_set_enetaddr("ethaddr", mac);
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}
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#endif
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init_leds();
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return 0;
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}
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#endif /* CONFIG_MISC_INIT_R */
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#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
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/* Configure and initialize PHY */
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void reset_phy(void)
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{
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mv_phy_88e1116_init("egiga0", 8);
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}
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#endif
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#if defined(CONFIG_KIRKWOOD_GPIO)
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/* Return GPIO push button status */
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static int
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do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
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}
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U_BOOT_CMD(button, 1, 1, do_read_push_button,
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"Return GPIO push button status 0=off 1=on", "");
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#endif
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