mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
a8d0526133
An SMC call is required for all cache-wide operations on Tegra186. This patch implements the two missing hooks now that U-Boot supports them, and fixes the mapping of "hook name" to SMC call code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
44 lines
1.1 KiB
ArmAsm
44 lines
1.1 KiB
ArmAsm
/*
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* Copyright (c) 2016, NVIDIA CORPORATION.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <config.h>
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#include <linux/linkage.h>
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#define SMC_SIP_INVOKE_MCE 0x82FFFF00
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#define MCE_SMC_ROC_FLUSH_CACHE (SMC_SIP_INVOKE_MCE | 11)
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#define MCE_SMC_ROC_FLUSH_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 14)
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#define MCE_SMC_ROC_CLEAN_CACHE_ONLY (SMC_SIP_INVOKE_MCE | 15)
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ENTRY(__asm_tegra_cache_smc)
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mov x1, #0
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mov x2, #0
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mov x3, #0
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mov x4, #0
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mov x5, #0
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mov x6, #0
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smc #0
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mov x0, #0
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ret
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ENDPROC(__asm_invalidate_l3_dcache)
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ENTRY(__asm_invalidate_l3_dcache)
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mov x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY & 0xffff)
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movk x0, #(MCE_SMC_ROC_FLUSH_CACHE_ONLY >> 16), lsl #16
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b __asm_tegra_cache_smc
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ENDPROC(__asm_invalidate_l3_dcache)
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ENTRY(__asm_flush_l3_dcache)
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mov x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY & 0xffff)
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movk x0, #(MCE_SMC_ROC_CLEAN_CACHE_ONLY >> 16), lsl #16
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b __asm_tegra_cache_smc
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ENDPROC(__asm_flush_l3_dcache)
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ENTRY(__asm_invalidate_l3_icache)
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mov x0, #(MCE_SMC_ROC_FLUSH_CACHE & 0xffff)
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movk x0, #(MCE_SMC_ROC_FLUSH_CACHE >> 16), lsl #16
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b __asm_tegra_cache_smc
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ENDPROC(__asm_invalidate_l3_icache)
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