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https://github.com/brain-hackers/u-boot-brain
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95f8791042
Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
78 lines
2.2 KiB
C
78 lines
2.2 KiB
C
/*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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typedef struct {
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u32 mtype;
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char *board_string;
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char *nand_string;
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} omap3_sysinfo;
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struct emu_hal_params {
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u32 num_params;
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u32 param1;
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};
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void prcm_init(void);
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void per_clocks_enable(void);
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void ehci_clocks_enable(void);
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void memif_init(void);
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void sdrc_init(void);
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void do_sdrc_init(u32, u32);
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void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
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u32 *mr);
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void identify_nand_chip(int *mfr, int *id);
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void emif4_init(void);
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void gpmc_init(void);
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void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
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u32 size);
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void watchdog_init(void);
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void set_muxconf_regs(void);
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u32 get_cpu_family(void);
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u32 get_cpu_rev(void);
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u32 get_sku_id(void);
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u32 get_sysboot_value(void);
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u32 is_gpmc_muxed(void);
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u32 get_gpmc0_type(void);
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u32 get_gpmc0_width(void);
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u32 is_running_in_sdram(void);
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u32 is_running_in_sram(void);
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u32 is_running_in_flash(void);
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u32 get_device_type(void);
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void secureworld_exit(void);
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void try_unlock_memory(void);
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u32 get_boot_type(void);
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void invalidate_dcache(u32);
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void sr32(void *, u32, u32, u32);
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u32 wait_on_value(u32, u32, void *, u32);
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void sdelay(unsigned long);
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void make_cs1_contiguous(void);
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void omap_nand_switch_ecc(int);
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void power_init_r(void);
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void dieid_num_r(void);
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void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
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void omap3_gp_romcode_call(u32 service_id, u32 parameter);
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#endif
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