u-boot-brain/arch/powerpc/cpu
Kumar Gala 6aba33e939 powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers.  Enable that cache as well as add information into the
device tree about it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
..
74xx_7xx Make sure that argv[] argument pointers are not modified. 2010-07-04 23:55:42 +02:00
mpc5xx Make sure that argv[] argument pointers are not modified. 2010-07-04 23:55:42 +02:00
mpc5xxx Make sure that argv[] argument pointers are not modified. 2010-07-04 23:55:42 +02:00
mpc8xx cmd_usage(): simplify return code handling 2010-07-24 20:43:57 +02:00
mpc8xxx powerpc/p3041: Add various p3041 related defines 2010-07-20 04:41:19 -05:00
mpc83xx cmd_usage(): simplify return code handling 2010-07-24 20:43:57 +02:00
mpc85xx powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms 2010-07-26 13:07:56 -05:00
mpc86xx 83xx/85xx/86xx: LBC register cleanup 2010-07-16 10:55:09 -05:00
mpc512x cmd_usage(): simplify return code handling 2010-07-24 20:43:57 +02:00
mpc824x Make sure that argv[] argument pointers are not modified. 2010-07-04 23:55:42 +02:00
mpc8220 Make sure that argv[] argument pointers are not modified. 2010-07-04 23:55:42 +02:00
mpc8260 cmd_usage(): simplify return code handling 2010-07-24 20:43:57 +02:00
ppc4xx ppc4xx: Add ECC status info to machine-check exception for IBM DDR2 core 2010-07-23 09:55:03 +02:00