mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-08 19:23:56 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2016 Google, Inc
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*/
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#ifndef __asm_arch_cpu_h
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#define __asm_arch_cpu_h
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/* CPU types */
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#define HASWELL_FAMILY_ULT 0x40650
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#define BROADWELL_FAMILY_ULT 0x306d0
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/* Supported CPUIDs */
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#define CPUID_HASWELL_A0 0x306c1
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#define CPUID_HASWELL_B0 0x306c2
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#define CPUID_HASWELL_C0 0x306c3
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#define CPUID_HASWELL_ULT_B0 0x40650
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#define CPUID_HASWELL_ULT 0x40651
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#define CPUID_HASWELL_HALO 0x40661
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#define CPUID_BROADWELL_C0 0x306d2
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#define CPUID_BROADWELL_D0 0x306d3
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#define CPUID_BROADWELL_E0 0x306d4
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/* Broadwell bus clock is fixed at 100MHz */
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#define BROADWELL_BCLK 100
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#define BROADWELL_FAMILY_ULT 0x306d0
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#define CORE_THREAD_COUNT_MSR 0x35
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#define MSR_VR_CURRENT_CONFIG 0x601
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#define MSR_VR_MISC_CONFIG 0x603
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#define MSR_PKG_POWER_SKU 0x614
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#define MSR_DDR_RAPL_LIMIT 0x618
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#define MSR_VR_MISC_CONFIG2 0x636
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/* Latency times in units of 1024ns. */
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#define C_STATE_LATENCY_CONTROL_0_LIMIT 0x42
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#define C_STATE_LATENCY_CONTROL_1_LIMIT 0x73
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#define C_STATE_LATENCY_CONTROL_2_LIMIT 0x91
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#define C_STATE_LATENCY_CONTROL_3_LIMIT 0xe4
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#define C_STATE_LATENCY_CONTROL_4_LIMIT 0x145
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#define C_STATE_LATENCY_CONTROL_5_LIMIT 0x1ef
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void cpu_set_power_limits(int power_limit_1_time);
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#endif
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