mirror of
https://github.com/brain-hackers/u-boot-brain
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6b6307ed22
Instead of querying SDM for FPGA configuration status through mailbox messages, U-Boot now checks System Manager's FPGA Config status register for FPGA configuration status before resetting bridge. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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|---|---|---|
| .. | ||
| include/mach | ||
| board.c | ||
| clock_manager_agilex.c | ||
| clock_manager_arria10.c | ||
| clock_manager_gen5.c | ||
| clock_manager_s10.c | ||
| clock_manager.c | ||
| firewall.c | ||
| fpga_manager.c | ||
| freeze_controller.c | ||
| Kconfig | ||
| mailbox_s10.c | ||
| Makefile | ||
| misc_arria10.c | ||
| misc_gen5.c | ||
| misc_s10.c | ||
| misc.c | ||
| mmu-arm64_s10.c | ||
| pinmux_arria10.c | ||
| qts-filter.sh | ||
| reset_manager_arria10.c | ||
| reset_manager_gen5.c | ||
| reset_manager_s10.c | ||
| scan_manager.c | ||
| spl_a10.c | ||
| spl_agilex.c | ||
| spl_gen5.c | ||
| spl_s10.c | ||
| system_manager_gen5.c | ||
| system_manager_s10.c | ||
| timer_s10.c | ||
| timer.c | ||
| wrap_iocsr_config.c | ||
| wrap_pinmux_config_s10.c | ||
| wrap_pinmux_config.c | ||
| wrap_pll_config_s10.c | ||
| wrap_pll_config.c | ||
| wrap_sdram_config.c | ||