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![Masahiro Yamada](/assets/img/avatar_default.png)
The PLL for the DRAM interface must be initialized in SPL, but the others can be delayed until U-Boot proper. Move them from SPL to U-Boot proper to save the precious SPL memory footprint. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
14 lines
247 B
C
14 lines
247 B
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef MACH_PLL_H
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#define MACH_PLL_H
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void uniphier_ld4_dpll_ssc_en(void);
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#endif /* MACH_PLL_H */
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