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![Masahiro Yamada](/assets/img/avatar_default.png)
The clock enable bits for UMC are more SoC-specific than for the other hardware blocks. Separate the UMC clocks and the other clocks for better code reuse across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
32 lines
620 B
C
32 lines
620 B
C
/*
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* Copyright (C) 2011-2014 Panasonic Corporation
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* Copyright (C) 2015-2017 Socionext Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc-regs.h"
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void uniphier_sld3_early_clk_init(void)
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{
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u32 tmp;
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/* deassert reset */
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if (spl_boot_device() != BOOT_DEVICE_NAND) {
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tmp = readl(SC_RSTCTRL);
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tmp &= ~SC_RSTCTRL_NRST_NAND;
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writel(tmp, SC_RSTCTRL);
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};
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/* provide clocks */
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tmp = readl(SC_CLKCTRL);
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tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI;
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writel(tmp, SC_CLKCTRL);
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readl(SC_CLKCTRL); /* dummy read */
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}
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