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https://github.com/brain-hackers/u-boot-brain
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78c627cf1f
The clock enable bits for UMC are more SoC-specific than for the other hardware blocks. Separate the UMC clocks and the other clocks for better code reuse across SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
29 lines
613 B
C
29 lines
613 B
C
/*
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* Copyright (C) 2016-2017 Socionext Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc64-regs.h"
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void uniphier_ld20_dram_clk_init(void)
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{
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u32 tmp;
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/* deassert reset */
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tmp = readl(SC_RSTCTRL7);
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tmp |= SC_RSTCTRL7_UMCSB | SC_RSTCTRL7_UMCA2 | SC_RSTCTRL7_UMCA1 |
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SC_RSTCTRL7_UMCA0 | SC_RSTCTRL7_UMC32 | SC_RSTCTRL7_UMC31 |
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SC_RSTCTRL7_UMC30;
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writel(tmp, SC_RSTCTRL7);
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/* provide clocks */
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tmp = readl(SC_CLKCTRL7);
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tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 |
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SC_CLKCTRL7_UMC30;
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writel(tmp, SC_CLKCTRL7);
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}
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