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![Christophe Leroy](/assets/img/avatar_default.png)
This patch adds a DM driver for the MPC8xx watchdog. Basically, the watchdog is enabled by default from the start and SYPCR register has to be writen once to set the timeout and/or deactivate the watchdog. Once written, it cannot be written again. It means that wdt_stop() can be called before wdt_start() to stop the watchdog, but cannot be called if wdt_start() has been called. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
70 lines
1.5 KiB
C
70 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2017 CS Systemes d'Information
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*/
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#include <common.h>
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#include <dm.h>
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#include <wdt.h>
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#include <mpc8xx.h>
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#include <asm/cpm_8xx.h>
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#include <asm/io.h>
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void hw_watchdog_reset(void)
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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out_be16(&immap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
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out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
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}
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#ifdef CONFIG_WDT_MPC8xx
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static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR);
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if (!(in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE))
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return -EBUSY;
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return 0;
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}
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static int mpc8xx_wdt_stop(struct udevice *dev)
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{
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immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
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out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE);
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if (in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE)
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return -EBUSY;
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return 0;
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}
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static int mpc8xx_wdt_reset(struct udevice *dev)
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{
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hw_watchdog_reset();
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return 0;
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}
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static const struct wdt_ops mpc8xx_wdt_ops = {
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.start = mpc8xx_wdt_start,
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.reset = mpc8xx_wdt_reset,
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.stop = mpc8xx_wdt_stop,
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};
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static const struct udevice_id mpc8xx_wdt_ids[] = {
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{ .compatible = "fsl,pq1-wdt" },
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{}
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};
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U_BOOT_DRIVER(wdt_mpc8xx) = {
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.name = "wdt_mpc8xx",
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.id = UCLASS_WDT,
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.of_match = mpc8xx_wdt_ids,
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.ops = &mpc8xx_wdt_ops,
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};
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#endif /* CONFIG_WDT_MPC8xx */
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