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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-08 04:06:15 +09:00
53cc647dc6
Support qspi flashes for mx7dsabresd 1. introduce pin mux settings 2. enable qspi clock 3. introduce related macro definitions Default QSPI is not enabled, since we need hardware rework to use QSPI, see SPF-28590, page 9: " QSPI signals are muxed with EPDC_D[7:0] When using QSPI: de-populate R388-R391, R396-R399 populate R392-R395, R299, R300 " After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi flashes can be deteced and read/erase/write. Log info: " => sf probe SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB => sf read 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Read: OK => sf erase 0 0x4000000 SF: 67108864 bytes @ 0x0 Erased: OK => sf write 0x80000000 0 0x4000000 device 0 whole chip SF: 67108864 bytes @ 0x0 Written: OK " Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
255 lines
7.0 KiB
C
255 lines
7.0 KiB
C
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX7D SABRESD board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MX7D_SABRESD_CONFIG_H
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#define __MX7D_SABRESD_CONFIG_H
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#include "mx7_common.h"
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#define CONFIG_DBG_MONITOR
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#define PHYS_SDRAM_SIZE SZ_1G
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/* Uncomment to enable secure boot support */
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/* #define CONFIG_SECURE_BOOT */
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#define CONFIG_CSF_SIZE 0x4000
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/* Network */
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#define CONFIG_CMD_MII
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_BROADCOM
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/* ENET1 */
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#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
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/* MMC Config*/
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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#undef CONFIG_BOOTM_NETBSD
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#undef CONFIG_BOOTM_PLAN9
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#undef CONFIG_BOOTM_RTEMS
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#undef CONFIG_CMD_EXPORTENV
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#undef CONFIG_CMD_IMPORTENV
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/* I2C configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_MFG_ENV_SETTINGS \
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"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
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"rdinit=/linuxrc " \
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"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
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"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
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"g_mass_storage.iSerialNumber=\"\" "\
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"clk_ignore_unused "\
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"\0" \
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"initrd_addr=0x83800000\0" \
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"initrd_high=0xffffffff\0" \
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"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=image raw 0 0x800000;"\
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"u-boot raw 0 0x4000;"\
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"bootimg part 0 1;"\
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"rootfs part 0 2\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_MFG_ENV_SETTINGS \
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CONFIG_DFU_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx7d-sdb.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX7
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_IMX_THERMAL
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#define CONFIG_CI_UDC
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#define CONFIG_USBD_HS
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET
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#define CONFIG_CMD_USB_MASS_STORAGE
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_USB_GADGET_DOWNLOAD
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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#define CONFIG_G_DNL_VENDOR_NUM 0x0525
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#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
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#define CONFIG_G_DNL_MANUFACTURER "FSL"
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/* USB Device Firmware Update support */
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#define CONFIG_CMD_DFU
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#define CONFIG_USB_FUNCTION_DFU
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#define CONFIG_DFU_MMC
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#define CONFIG_DFU_RAM
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#define CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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#define CONFIG_CFB_CONSOLE
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_SW_CURSOR
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#define CONFIG_VGA_AS_SINGLE_DEVICE
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#endif
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#ifdef CONFIG_FSL_QSPI
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_MACRONIX
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define FSL_QSPI_FLASH_NUM 1
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#define FSL_QSPI_FLASH_SIZE SZ_64M
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#define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
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#define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
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#endif
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#endif /* __CONFIG_H */
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