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![Kuo-Jung Su](/assets/img/avatar_default.png)
Even though the MMU/D-cache is off, some DMA engines still expect strict address alignment. For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet controllers expect the tx/rx descriptors should always be aligned to 16-bytes boundary. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
35 lines
760 B
C
35 lines
760 B
C
/*
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* (C) Copyright 2007
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_DMA_MAPPING_H
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#define __ASM_ARM_DMA_MAPPING_H
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enum dma_data_direction {
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DMA_BIDIRECTIONAL = 0,
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DMA_TO_DEVICE = 1,
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DMA_FROM_DEVICE = 2,
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};
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static void *dma_alloc_coherent(size_t len, unsigned long *handle)
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{
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*handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len);
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return (void *)*handle;
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}
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static inline unsigned long dma_map_single(volatile void *vaddr, size_t len,
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enum dma_data_direction dir)
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{
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return (unsigned long)vaddr;
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}
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static inline void dma_unmap_single(volatile void *vaddr, size_t len,
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unsigned long paddr)
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{
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}
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#endif /* __ASM_ARM_DMA_MAPPING_H */
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