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https://github.com/brain-hackers/u-boot-brain
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fcc238baee
Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
33 lines
643 B
C
33 lines
643 B
C
/*
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* Copyright (C) 2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc64-regs.h"
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int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd)
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{
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u32 tmp;
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/* deassert reset */
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tmp = readl(SC_RSTCTRL7);
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tmp |= SC_RSTCTRL7_UMC31 | SC_RSTCTRL7_UMC30;
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writel(tmp, SC_RSTCTRL7);
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/* provide clocks */
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tmp = readl(SC_CLKCTRL4);
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tmp |= SC_CLKCTRL4_PERI;
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writel(tmp, SC_CLKCTRL4);
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tmp = readl(SC_CLKCTRL7);
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tmp |= SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30;
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writel(tmp, SC_CLKCTRL7);
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return 0;
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}
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