mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
ad9b5f77df
This commit introduces timer driver for ARC. ARC timers are configured via ARC AUX registers so we use special functions to access timer control registers. This driver allows utilization of either timer0 or timer1 depending on which one is available in real hardware. Essentially only existing timers should be mentioned in board's Device Tree description. Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com> Reviewed-by: Simon Glass <sjg@chromium.org>
25 lines
470 B
Plaintext
25 lines
470 B
Plaintext
ARC Timer
|
|
|
|
Required properties:
|
|
|
|
- compatible : should be "snps,arc-timer".
|
|
- reg : Specifies timer ID, could be either 0 or 1.
|
|
- clocks : Specifies clocks that drives the counter.
|
|
|
|
Examples:
|
|
|
|
timer@0 {
|
|
compatible = "snps,arc-timer";
|
|
clocks = <&core_clk>;
|
|
reg = <0>;
|
|
};
|
|
|
|
timer@1 {
|
|
compatible = "snps,arc-timer";
|
|
clocks = <&core_clk>;
|
|
reg = <1>;
|
|
};
|
|
|
|
NOTE: if you specify both timers, clocks always should be the same
|
|
as each timer is driven by the same core clock.
|