mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
b594ec89fb
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
Linux dts commit details:
commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
80 lines
2.1 KiB
Plaintext
80 lines
2.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_STM32MP=y
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CONFIG_SYS_MALLOC_F_LEN=0x3000
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CONFIG_SYS_MEMTEST_START=0xc0000000
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CONFIG_SYS_MEMTEST_END=0xc4000000
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CONFIG_ENV_OFFSET=0x280000
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CONFIG_SPL_TEXT_BASE=0x2FFC2500
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_TARGET_ICORE_STM32MP1=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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# CONFIG_ARMV7_VIRT is not set
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2"
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_FIT=y
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CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SYS_PROMPT="STM32MP> "
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CONFIG_CMD_ADTIMG=y
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CONFIG_CMD_ERASEENV=y
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_ADC=y
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CONFIG_CMD_CLK=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_REMOTEPROC=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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CONFIG_CMD_TIMER=y
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT4_WRITE=y
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# CONFIG_SPL_DOS_PARTITION is not set
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CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
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CONFIG_ENV_IS_NOWHERE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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# CONFIG_SPL_ENV_IS_NOWHERE is not set
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CONFIG_DM_HWSPINLOCK=y
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CONFIG_HWSPINLOCK_STM32=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_STM32F7=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_DM_MAILBOX=y
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CONFIG_STM32_IPCC=y
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CONFIG_STM32_FMC2_EBI=y
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CONFIG_DM_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_STM32_SDMMC2=y
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CONFIG_PHY_REALTEK=y
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CONFIG_DM_ETH=y
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CONFIG_DWC_ETH_QOS=y
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CONFIG_PHY=y
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CONFIG_PINCONF=y
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# CONFIG_SPL_PINCTRL_FULL is not set
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CONFIG_PINCTRL_STMFX=y
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CONFIG_DM_PMIC=y
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# CONFIG_SPL_PMIC_CHILDREN is not set
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CONFIG_PMIC_STPMIC1=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_REMOTEPROC_STM32_COPRO=y
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CONFIG_DM_RTC=y
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CONFIG_RTC_STM32=y
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CONFIG_SERIAL_RX_BUFFER=y
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CONFIG_WDT=y
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CONFIG_WDT_STM32MP=y
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CONFIG_LZO=y
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CONFIG_ERRNO_STR=y
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