mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2011
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* Matthias Weisser <weisserm@arcor.de>
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*
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* (C) Copyright 2009 DENX Software Engineering
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* Author: John Rigby <jrigby@gmail.com>
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*
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* Common asm macros for imx25
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*/
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#ifndef __ASM_ARM_ARCH_MACRO_H__
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#define __ASM_ARM_ARCH_MACRO_H__
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#ifdef __ASSEMBLY__
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#include <asm/arch/imx-regs.h>
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#include <generated/asm-offsets.h>
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#include <asm/macro.h>
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/*
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* AIPS setup - Only setup MPROTx registers.
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* The PACR default values are good.
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*
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* Default argument values:
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* - MPR: Set all MPROTx to be non-bufferable, trusted for R/W, not forced to
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* user-mode.
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*/
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.macro init_aips mpr=0x77777777
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ldr r0, =IMX_AIPS1_BASE
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ldr r1, =\mpr
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str r1, [r0, #AIPS_MPR_0_7]
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str r1, [r0, #AIPS_MPR_8_15]
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ldr r2, =IMX_AIPS2_BASE
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str r1, [r2, #AIPS_MPR_0_7]
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str r1, [r2, #AIPS_MPR_8_15]
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.endm
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/*
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* MAX (Multi-Layer AHB Crossbar Switch) setup
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*
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* Default argument values:
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* - MPR: priority is IAHB > DAHB > USBOTG > RTIC > eSDHC2/SDMA
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* - SGPCR: always park on last master
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* - MGPCR: restore default values
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*/
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.macro init_max mpr=0x00043210, sgpcr=0x00000010, mgpcr=0x00000000
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ldr r0, =IMX_MAX_BASE
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ldr r1, =\mpr
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str r1, [r0, #MAX_MPR0] /* for S0 */
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str r1, [r0, #MAX_MPR1] /* for S1 */
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str r1, [r0, #MAX_MPR2] /* for S2 */
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str r1, [r0, #MAX_MPR3] /* for S3 */
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str r1, [r0, #MAX_MPR4] /* for S4 */
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ldr r1, =\sgpcr
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str r1, [r0, #MAX_SGPCR0] /* for S0 */
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str r1, [r0, #MAX_SGPCR1] /* for S1 */
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str r1, [r0, #MAX_SGPCR2] /* for S2 */
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str r1, [r0, #MAX_SGPCR3] /* for S3 */
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str r1, [r0, #MAX_SGPCR4] /* for S4 */
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ldr r1, =\mgpcr
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str r1, [r0, #MAX_MGPCR0] /* for M0 */
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str r1, [r0, #MAX_MGPCR1] /* for M1 */
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str r1, [r0, #MAX_MGPCR2] /* for M2 */
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str r1, [r0, #MAX_MGPCR3] /* for M3 */
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str r1, [r0, #MAX_MGPCR4] /* for M4 */
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.endm
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/*
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* M3IF setup
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*
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* Default argument values:
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* - CTL:
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* MRRP[0] = LCDC on priority list (1 << 0) = 0x00000001
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* MRRP[1] = MAX1 not on priority list (0 << 1) = 0x00000000
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* MRRP[2] = MAX0 not on priority list (0 << 2) = 0x00000000
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* MRRP[3] = USBH not on priority list (0 << 3) = 0x00000000
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* MRRP[4] = SDMA not on priority list (0 << 4) = 0x00000000
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* MRRP[5] = eSDHC1/ATA/FEC not on priority list (0 << 5) = 0x00000000
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* MRRP[6] = LCDC/SLCDC/MAX2 not on priority list (0 << 6) = 0x00000000
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* MRRP[7] = CSI not on priority list (0 << 7) = 0x00000000
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* ------------
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* 0x00000001
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*/
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.macro init_m3if ctl=0x00000001
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/* M3IF Control Register (M3IFCTL) */
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write32 IMX_M3IF_CTRL_BASE, \ctl
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARM_ARCH_MACRO_H__ */
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