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https://github.com/brain-hackers/u-boot-brain
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0b3ce83d7b
This commit adds the baseline defconfig for the RK3399-Q7 (Puma) SoM (under the name 'puma-rk3399_defconfig') featuring the Rockchip RK3399 in a Qseven compatible module. This subsumes the following changes: * defconfig: rk3399: migrate CONFIG_SPL_LIBCOMMON_SUPPORT/CONFIG_SPL_LIBGENERIC_SUPPORT * defconfig: rk3399-puma: add CONFIG_MMC_DW_ROCKCHIP * defconfig: rk3399-puma: disable CONFIG_SPL_OF_PLATDATA * defconfig: rk3399-puma: don't USE_TINY_PRINTF * defconfig: rk3399-puma: set up CONFIG_SYS_BOARD for the RK3399-Q7 * defconfig: rk3399-puma: enable the multi-image loading via CONFIG_SPL_FIT * defconfig: rk3399-puma: SPL should be able to boot from MMC/SD card * defconfig: rk3399-puma: enable GMAC support * defconfig: rk3399-puma: enable support for SPI and Winbond SPI flash * defconfig: rk3399-puma: enable SPI as a boot-source in SPL * defconfig: rk3399-puma: disallow non-FIT images from being loaded * defconfig: rk3399-puma: rename to puma-rk3399 * rockchip: config: rk3399: update defconfigs and rk3399_common For the RK3399-Q7, we want a default boot-order of SPI -> MMC -> uSD. This both follows how the BootROM probes devices and is a sane default for customers in device-personalisation (e.g. it allows for quick and easy factory programming of unpersonalised devices using an SD card) and field usage (with customer devices expected to have their firmware either in SPI or MMC). However, when probing multiple interfaces (according to the result from the board_boot_order function), we need to ensure that only valid FIT images are considered and disable the fallback to assuming that a raw (binary-only) U-Boot image is loaded (to avoid hangs/crashes from jumping to random content loaded from devices that are probed, but don't contain valid image content). By disabling the SPL_RAW_IMAGE_SUPPORT and SPL_LEGACY_IMAGE_SUPPORT options, we ensure that raw images (indistinguishable from random data) are not considered for booting. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org> Drop CONFIG_DEBUG_UART_BOARD_INIT: Signed-off-by: Simon Glass <sjg@chromium.org>
87 lines
2.1 KiB
C
87 lines
2.1 KiB
C
/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_RK3399_COMMON_H
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#define __CONFIG_RK3399_COMMON_H
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#include "rockchip-common.h"
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_ENV_SIZE 0x2000
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define COUNTER_FREQUENCY 24000000
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#define CONFIG_SYS_NS16550_MEM32
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#define CONFIG_SYS_TEXT_BASE 0x00200000
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#define CONFIG_SYS_INIT_SP_ADDR 0x00300000
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#define CONFIG_SYS_LOAD_ADDR 0x00800800
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#define CONFIG_SPL_STACK 0xff8effff
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#define CONFIG_SPL_TEXT_BASE 0xff8c2000
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#define CONFIG_SPL_MAX_SIZE 0x30000
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/* BSS setup */
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#define CONFIG_SPL_BSS_START_ADDR 0xff8e0000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x10000
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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/* MMC/SD IP block */
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
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#define CONFIG_SUPPORT_VFAT
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#define CONFIG_FS_FAT
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#define CONFIG_FAT_WRITE
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#define CONFIG_FS_EXT4
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/* RAW SD card / eMMC locations. */
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#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
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/* FAT sd card locations. */
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SYS_SDRAM_BASE 0
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#ifndef CONFIG_SPL_BUILD
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x00000000\0" \
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"pxefile_addr_r=0x00100000\0" \
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"fdt_addr_r=0x01f00000\0" \
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"kernel_addr_r=0x02000000\0" \
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"ramdisk_addr_r=0x04000000\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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"partitions=" PARTS_DEFAULT \
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BOOTENV
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#endif
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/* enable usb config for usb ether */
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_USB_ETHER_ASIX88179
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#define CONFIG_USB_ETHER_MCS7830
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#define CONFIG_USB_ETHER_SMSC95XX
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#define CONFIG_USB_ETHER_RTL8152
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/* rockchip xhci host driver */
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#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
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#endif
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