mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 22:03:22 +09:00
67f99f970f
Platform knows whether MRC cache is implemented, but using it can be a choice of a specific board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
34 lines
479 B
Plaintext
34 lines
479 B
Plaintext
#
|
|
# Copyright (C) 2016 Google Inc.
|
|
#
|
|
# SPDX-License-Identifier: GPL-2.0
|
|
|
|
config INTEL_BROADWELL
|
|
bool
|
|
select CACHE_MRC_BIN
|
|
select ARCH_EARLY_INIT_R
|
|
imply HAVE_INTEL_ME
|
|
imply ENABLE_MRC_CACHE
|
|
|
|
if INTEL_BROADWELL
|
|
|
|
config DCACHE_RAM_BASE
|
|
default 0xff7c0000
|
|
|
|
config DCACHE_RAM_SIZE
|
|
default 0x40000
|
|
|
|
config DCACHE_RAM_MRC_VAR_SIZE
|
|
default 0x30000
|
|
|
|
config CPU_SPECIFIC_OPTIONS
|
|
def_bool y
|
|
select SMM_TSEG
|
|
select X86_RAMTEST
|
|
|
|
config SMM_TSEG_SIZE
|
|
hex
|
|
default 0x800000
|
|
|
|
endif
|