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https://github.com/brain-hackers/u-boot-brain
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![Vincent BENOIT](/assets/img/avatar_default.png)
-> Add National instrument ethernet transceiver configuration used (DP83848) -> Change cpsw slave phy address -> modify nand configuration to use the correct ECC and correct nand features
240 lines
7.7 KiB
C
240 lines
7.7 KiB
C
/*
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* pengwyn.h
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*
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* Copyright (C) 2013 Lothar Felten <lothar.felten@gmail.com>
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*
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* based on am335x_evm.h, Copyright (C) 2011 Texas Instruments Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_PENGWYN_H
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#define __CONFIG_PENGWYN_H
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#define CONFIG_NAND
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#define CONFIG_SERIAL1
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#define CONFIG_CONS_INDEX 1
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#include <configs/ti_am335x_common.h>
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/* Clock Defines */
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#define V_OSCK 24000000
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#define V_SCLK V_OSCK
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/* set env size */
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#define CONFIG_ENV_SIZE 0x4000
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#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x80200000\0" \
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"fdtaddr=0x80F80000\0" \
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"bootpart=0:2\0" \
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"bootdir=/boot\0" \
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"bootfile=zImage\0" \
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"fdtfile=am335x-pengwyn.dtb\0" \
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"console=ttyO0,115200n8\0" \
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"optargs=\0" \
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"mmcdev=0\0" \
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"mmcroot=/dev/mmcblk0p2 ro\0" \
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"mmcrootfstype=ext4 rootwait\0" \
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"rootpath=/export/rootfs\0" \
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"nfsopts=nolock\0" \
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"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
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"::off\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype}\0" \
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"netargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=/dev/nfs " \
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"nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
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"ip=dhcp\0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t $loadaddr $filesize\0" \
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"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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"mmcloados=run mmcargs; " \
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"bootz ${loadaddr} - ${fdtaddr};\0" \
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"mmcboot=mmc dev ${mmcdev}; " \
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"if mmc rescan; then " \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loadimage; then " \
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"run loadfdt;" \
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"run mmcloados;" \
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"fi;" \
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"fi;\0" \
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"netboot=echo Booting from network ...; " \
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"setenv autoload no; " \
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"dhcp; " \
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"tftp ${loadaddr} ${bootfile}; " \
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"tftp ${fdtaddr} ${fdtfile}; " \
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"run netargs; " \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"nandargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${nandroot} " \
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"rootfstype=${nandrootfstype}\0" \
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"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
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"nandrootfstype=ubifs rootwait=1\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${fdtaddr} u-boot-spl-os; " \
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"nand read ${loadaddr} kernel; " \
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"bootz ${loadaddr} - ${fdtaddr}\0"
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#endif
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#define CONFIG_BOOTCOMMAND \
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"run mmcboot;" \
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"run nandboot;"
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/* NS16550 Configuration: primary UART via FDTI */
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#define CONFIG_SYS_NS16550_COM1 0x44e09000
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#define CONFIG_BAUDRATE 115200
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/* I2C Configuration */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_CMD_EEPROM
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_MULTI_EEPROMS
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/* SPL */
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_YMODEM_SUPPORT
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/* General network SPL */
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#define CONFIG_SPL_NET_SUPPORT
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#define CONFIG_SPL_ENV_SUPPORT
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#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
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/* NAND support */
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#define CONFIG_CMD_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_NAND_OMAP_ELM
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/* NAND Configuration. */
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
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CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_PAGE_SIZE 4096
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#define CONFIG_SYS_NAND_OOBSIZE 224
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_BLOCK_SIZE (128*4096)
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
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#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\
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18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,\
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34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49,\
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50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,\
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66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81,\
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82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,\
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98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,\
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114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133,\
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134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,\
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154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173,\
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174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193,\
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194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209}
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#define CONFIG_SYS_NAND_ECCSIZE 512
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#define CONFIG_SYS_NAND_ECCBYTES 26
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#define CONFIG_SYS_NAND_ECCSTEPS 8
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#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
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CONFIG_SYS_NAND_ECCSTEPS)
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#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
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/* END NAND Configuration. */
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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/* #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 */
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_ASKENV /* monitor functions : ask for env variable */
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#define CONFIG_VERSION_VARIABLE /* monitor functions : u-boot version */
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#define CONFIG_CMD_DIAG /* monitor functions : Diagnostics */
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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/* Size must be a multiple of Nand erase size (524288 b) */
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(SPL)," \
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"512k(SPL.backup1)," \
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"512k(SPL.backup2)," \
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"512k(SPL.backup3),1536k(u-boot)," \
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"512k(u-boot-spl-os)," \
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"512k(u-boot-env),5m(kernel),-(rootfs)"
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_CMD_SPL_NAND_OFS 0x240000 /* un-assigned */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/*
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* USB configuration. We enable MUSB support, both for host and for
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* gadget. We set USB0 as peripheral and USB1 as host, based on the
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* board schematic and physical port wired to each. Then for host we
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* add mass storage support.
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*/
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#define CONFIG_USB_MUSB_DSPS
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#define CONFIG_ARCH_MISC_INIT
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#define CONFIG_USB_MUSB_GADGET
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#define CONFIG_USB_MUSB_PIO_ONLY
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#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
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#define CONFIG_USB_GADGET
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#define CONFIG_USB_GADGET_DUALSPEED
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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#define CONFIG_USB_MUSB_HOST
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#define CONFIG_AM335X_USB0
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#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
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#define CONFIG_AM335X_USB1
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#define CONFIG_AM335X_USB1_MODE MUSB_HOST
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#if defined(CONFIG_USB_MUSB_HOST)
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#define CONFIG_CMD_USB
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#define CONFIG_USB_STORAGE
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#endif
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#if defined(CONFIG_SPL_BUILD)
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/* disable host part of MUSB in SPL */
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#undef CONFIG_USB_MUSB_HOST
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/* Disable CPSW SPL support so we fit within the 101KiB limit. */
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#undef CONFIG_SPL_ETH_SUPPORT
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#endif
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/* CPSW ethernet */
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#define CONFIG_NET_MULTI
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/* Network */
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#define CONFIG_CMD_MII
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_RESET 1
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#define CONFIG_PHY_NATSEMI
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#define CONFIG_PHY_REALTEK
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/* CPSW support */
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#define CONFIG_SPL_ETH_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
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#endif /* ! __CONFIG_PENGWYN_H */
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